Power Consumption Reduction Through Dynamic Reconfiguration
Dynamic reconfiguration optimizes the use of hardware resources, and therefore may produce important reductions in power consumption. However, in a reconfigurable system the power consumption produced by the reconfiguration process itself must be taken into account. In this work the reconfiguration power consumption is characterized for a SRAM FPGA. In particular, we show that reconfiguration must be made at the highest frequency available in order to reduce power consumption. The results obtained allow to quantify the tradeoff between the energy saved by the use of dynamic reconfiguration and the energy wasted by the reconfiguration process. In this way, the power consumption reduction that can be obtained with the use of dynamic reconfiguration can be estimated.
KeywordsPower Consumption Power Consumption Reduction Dynamic Reconfiguration Partial Reconfiguration Dynamic Power Consumption
Unable to display preview. Download preview PDF.
- 1.Hartenstein, R.: Trends in Reconfigurable Logic and Reconfigurable Computing. In: 9th International Conference on Electronics, Circuits and Systems, September 15-18, vol. 2, pp. 801–808 (2002)Google Scholar
- 2.Rabaey, J.M.: Reconfigurable processing: the solution to low-power programmable DSP. In: IEEE International Conference on Acoustics, Speech, and Signal Processing, 1997. ICASSP 1997, April 21-24, vol. 1, pp. 275–278 (1997)Google Scholar
- 3.Spartan-3 2.5V FPGA Family: Complete Data Sheet. DS099 Advance Product Specification. Xilinx Inc. (March 2004)Google Scholar
- 4.Xpower, “Xpower Tutorial FPGA design”, Xpower (V1.0) May 11, Xilinx (2001)Google Scholar
- 5.Becker, J., Huebner, M., Ullmann, M.: Power Estimation and Power Measurement of Xilinx Virtex FPGAs: Trade-offs and Limitations. In: Proceedings of the 16th Symposium on Integrated Circuits and Systems Design (SBCCI 2003), September 8-11, pp. 283–288 (2003)Google Scholar
- 6.Benini, L., de Micheli, G., Macii, E.: Designing Low-Power Circuits: Practical Recipes. IEEE Circuits and Systems Magazine 1(1) First Quarter, 6–25 (2001)Google Scholar
- 7.Mengibar, L.: Contribution to low power design in FPGAs. PhD Thesis Carlos III University of Madrid (2003)Google Scholar