Storage Allocation for Diverse FPGA Memory Specifications

  • Dalia Dagher
  • Iyad Ouaiss
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3203)


A previous study [1] demonstrates the advantages of replacing registers by FPGA embedded memories during the storage allocation phase of High-Level Synthesis. The trend in new FPGAs to have large amounts of on-chip embedded memories motivated this proposition and resulted in substantial area decrease in the synthesized designs. This paper elaborates further on the various possibilities involved during storage allocation onto embedded memories, and presents new memory binding techniques. These techniques include modifications to the memory mapping procedure presented in [1] and cater to various memory specifications. The embedded memories differ in their assumptions of the number of memory banks, the number of ports on each bank, and the read/write types of each port. The paper highlights the benefits of the new techniques and discusses the pros and cons involved in each case. The Discrete Cosine Transform (DCT) benchmark illustrates the area improvements obtained in the new approaches compared to conventional register binding (up to 47%). The results are evaluated through an analysis of both area and delay performances.


Discrete Cosine Transform Memory Mapping Memory Bank Register Allocation Storage Allocation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    Al Atat, H., Ouaiss, I.: Register Binding for FPGAs with Embedded Memory. In: Proceedings of the Twelfth IEEE Workshop on FPGAs for Custom Computing Machines, April 2004, IEEE Computer Society Press, Los Alamitos (2004) (accepted for publication)Google Scholar
  2. 2.
    Ahmad, I., Roger Chen, C.Y.: Post Processor for Data Path Synthesis Using Multiport Memories. In: Proc. IC-CAD 1991, pp. 276–279 (1991)Google Scholar
  3. 3.
    McFarland, M.C., Parker, A.C., Camposano, R.: Tutorial on high-level synthesis. In: Proc. 25th Design Automation Conf., pp. 330–336 (1988)Google Scholar
  4. 4.
    De Micheli, G.: Synthesis and Optimization of Digital Circuits. McGraw-Hill, New York (1994)Google Scholar
  5. 5.
    Gajski, D., Dutt, N., Wu, A., Lin, S.: High-Level Synthesis. Kluwer Academic Publishers, Boston (1992)Google Scholar
  6. 6.
    Lin, Y.-L.: Survey Paper: Recent developments in high-level synthesis. ACM Transactions on Design Automation of Electronic Systems 2(1), 2–21 (1997)CrossRefGoogle Scholar
  7. 7.
    Stok, L.: Interconnection Optimisation during Data Path Allocation. In: Proc. EDAC, pp. 141–145 (1990)Google Scholar
  8. 8.
    Kim, T., Liu, C.L.: Utilization Multiport Memories in Data Path Synthesis. In: 30th ACM/IEEE Design Automation Conference, pp. 298–302 (1993)Google Scholar
  9. 9.
    Tseng, C.-J., Siewiorek, D.P.: Automated Synthesis of Data Paths in Digital Systems. IEEE Trans. CAD CAD-5(3), 379–395 (1986)Google Scholar
  10. 10.
    Kurdahi, F.J., Parker, A.C.: REAL: A Program for Register Allocation. In: Proceedings of the 24th Design Automation Conference, pp. 210–215 (1987)Google Scholar
  11. 11.
    Ellervee, P., Miranda, M., Catthoor, F., Hemani, A.: Exploiting Data Transfer Locality in Memory Mapping (1999)Google Scholar
  12. 12.
    Balakrishnan, M., et al.: Allocation of Multiport Memories in Data Path Synthesis. IEEE Trans. CAD 7(4), 536–540 (1988)Google Scholar
  13. 13.
    Altera Corporation,
  14. 14.
    Luthra, M., Gupta, S., Dutt, N.D., Gupta, R., Nicolau, A.: Interface Synthesis using Memory Mapping for an FPGA Platform. In: 21st Intl. Conference on Computer Design, October 2003, pp. 140–145 (2003)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • Dalia Dagher
    • 1
  • Iyad Ouaiss
    • 1
  1. 1.Department of Computer EngineeringLebanese American UniversityByblosLebanon

Personalised recommendations