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A Key Management Architecture for Securing Off-Chip Data Transfers

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 3203))

Abstract

Data security is becoming ever more important in embedded and portable electronic devices. The sophistication of the malicious techniques used by attackers is amazingly advanced. Defensive measures for protecting a device must be even more sophisticated and robust. This paper presents an architecture that manages cryptographic keys for a secure memory interface on an FPGA. The architecture includes functional units that serve to authenticate a user, create a key with multiple layers of security, and encrypt an external memory interface using that key. Cryptographic methods built into the system include an RSA-related secure key exchange, the Secure Hash Algorithm, a certificate storage system, and the Data Encryption Standard algorithm in counter mode.

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References

  1. Celoxica Limited: RC1000 Hardware Reference Manual. Version 2.3. RM-1120-0 (2001), http://www.celoxica.com

  2. Maxim/Dallas Semiconductor Corporation: Java-Powered Cryptographic iButton (2003), http://www.ibutton.com/ibuttons/java.html

  3. National Institute of Standards and Technology (NIST): FIPS Publication 46-2. Data Encryption Standard (1993)

    Google Scholar 

  4. Xilinx, Incorporated: Virtex-E 1.8V Field-Programmable Gate Arrays (2002), http://www.xilinx.com/bvdocs/publications/ds022-1.pdf

  5. Maxim Integrated Products: DS9097U Universal 1-Wire COM Port Adapter (2004), http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2983/ln/en

  6. Chappell, S., Sullivan, C.: Handel-C for co-processing & co-design of Field Programmable System on Chip. In: Workshop on Reconfigurable Computing and Applications (JCRA) (September 2002)

    Google Scholar 

  7. Maxim/Dallas Semiconductor Corporation: iB-IDE – New IDE for the Java-powered iButton (2003), http://www.ibutton.com/iB-IDE/

  8. Rivest, R.L., Shamir, A., Adleman, L.M.: A method for obtaining digital signatures and public-key cryptosystems. Communications of the ACM 2(21), 120–126 (1978)

    Article  MathSciNet  Google Scholar 

  9. National Institute of Standards and Technology (NIST): NIST PKI Program (2001), http://csrc.nist.gov/pki/

  10. National Institute of Standards and Technology (NIST): FIPS Publication 180. Secure Hash Standard (1993)

    Google Scholar 

  11. Lipmaa, H., Rogaway, P., Wagner, D.: Comments to NIST concerning AES Modes of Operations. CTR-Mode Encryption. Modes of Operation for Symmetric Key Block Ciphers. First Modes of Operation Workshop, online (October 2000), at http://csrc.nist.gov/CryptoToolkit/modes/workshop1/papers/lipmaa-ctr.pdf

  12. Biham, E., Shamir, A.: Differential Cryptanalysis of the Data Encryption Standard. Springer, Heidelberg (1993)

    MATH  Google Scholar 

  13. National Institute of Standards and Technology (NIST): FIPS Publication 197. Advanced Encryption Standard (2001)

    Google Scholar 

  14. National Institute of Standards and Technology (NIST): FIPS Publication 46-3. Data Encryption Standard (1999)

    Google Scholar 

  15. Xilinx, Incorporated: Virtex-II 1.5V Field-Programmable Gate Arrays (2001), http://www.ida.ing.tu-bs.de/service/download/DigSchalt/Zusatz/xilinx_virtexII.pdf

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© 2004 Springer-Verlag Berlin Heidelberg

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Graf, J., Athanas, P. (2004). A Key Management Architecture for Securing Off-Chip Data Transfers. In: Becker, J., Platzner, M., Vernalde, S. (eds) Field Programmable Logic and Application. FPL 2004. Lecture Notes in Computer Science, vol 3203. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30117-2_6

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  • DOI: https://doi.org/10.1007/978-3-540-30117-2_6

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-22989-6

  • Online ISBN: 978-3-540-30117-2

  • eBook Packages: Springer Book Archive

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