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A Modular System for FPGA-Based TCP Flow Processing in High-Speed Networks

  • David V. Schuehler
  • John W. Lockwood
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3203)

Abstract

Field Programmable Gate Arrays (FPGAs) can be used in Intrusion Prevention Systems (IPS) to inspect application data contained within network flows. An IPS operating on high-speed network traffic can be used to stop the propagation of Internet worms and to protect networks from Denial of Services (DoS) attacks. When used in the backbone of a core network, the device will be exposed to millions of active flows simultaneously. In order to protect the data in each connection, network devices will need to track the state of every flow. This must be done at multi-gigabit line rates without introducing significant delays.

This paper describes a high performance TCP processing system called TCP-Processor which supports flow processing in high-speed networks utilizing multiple devices. This circuit provides stateful flow tracking, TCP stream reassembly, context storage, and flow manipulation services for applications which process TCP data streams. A simple client interface eases the complexities associated with processing TCP data streams. In addition, a set of encoding and decoding circuits has been developed which efficiently transports this interface between multiple FPGA devices. The circuit has been implemented in FPGA hardware and tested using live Internet traffic.

Keywords

Field Programmable Gate Array FPGA Device Ternary Content Addressable Memory Intrusion Prevention System Network Data Packet 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • David V. Schuehler
    • 1
  • John W. Lockwood
    • 1
  1. 1.Applied Research LaboratoryWashington UniversitySt. LouisUSA

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