Advertisement

Evolvable Hardware for Signal Separation and Noise Cancellation Using Analog Reconfigurable Device

  • D. Keymeulen
  • R. Zebulum
  • A. Stoica
  • V Duong
  • M. I. Ferguson
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3203)

Abstract

Evolvable systems in silicon are third generation hardware in terms of flexibility. The first generation was fixed silicon: once a device was fabricated its structure was forever fixed. Reconfigurable hardware came as a second generation: new configurations could be downloaded changing the function of the device and also bypassing faulty areas, if any. The third generation is that of self-configurable, evolvable hardware (EHW), and adds the automatic reconfiguration feature, enabling truly adaptive hardware. This paper addresses current efforts in building and using evolvable chips. The first section refers to evolutionary algorithms for evolvable hardware. The second section describes the JPL evolvable hardware testbed and the JPL Field Programmable Transistor Array (FPTA) chip designed and used for circuit evolution in silicon. The third section addresses the application of evolvable hardware for signal separation and noise cancellation. The final section concludes the work.

Keywords

Fast Fourier Transform Signal Separation Noise Cancellation Evolvable Hardware Voice Signal 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Ferguson, M.I., Stoica, A., Zebulum, R., Keymeulen, D., Duong, V.: An Evolvable Hardware Platform based on DSP and FPTA. In: Proceedings of the Genetic and Evolutionary Computation Conference, New York, July 9-13, pp. 145–152 (2002)Google Scholar
  2. 2.
    Stoica, A., et al.: Reconfigurable VLSI Architectures for Evolvable Hardware: from Experimental Field Programmable Transistor Arrays to Evolution-Oriented Chips. IEEE Trans. on VLSI 9(1), 227–232 (2001)CrossRefGoogle Scholar
  3. 3.
    Stoica, A., et al.: Evolving Circuits in Seconds: Experiments with a Stand-Alone Board Level Evolvable System. In: 2002 NASA/DoD Conf. on Evolvable Hardware, July 15-18, pp. 67–74. IEEE Computer Press, Los Alamitos (2002)CrossRefGoogle Scholar
  4. 4.
    Anadigm, Inc., Evaluation Board User Manual, http://www.anadigm.com
  5. 5.
    Stoica, A., Lohn, J., Keymeulen, D., Zebulum, R.: Proceedings of NASA/DoD Conference on Evolvable Hardware. IEEE Computer Society, Los Alamitos (July 1999-June 2003)Google Scholar
  6. 6.
    Zebulum, R., Pacheco, M., Vellasco, M.: Evolutionary Electronics: Automatic Design of Electronic Circuits and Systems by Genetic Algorithms. CRC Press, Boca Raton (2002)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • D. Keymeulen
    • 1
  • R. Zebulum
    • 1
  • A. Stoica
    • 1
  • V Duong
    • 1
  • M. I. Ferguson
    • 1
  1. 1.Jet Propulsion Laboratory4800 Oak Grove Laboratory 

Personalised recommendations