Algorithms and Architectures for Use in FPGA Implementations of Identity Based Encryption Schemes

  • Tim Kerins
  • Emanuel Popovici
  • William Marnane
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3203)


In this paper algorithms and architectures for new GF(3 m ) multiplier and inverter components are presented. It is described how they can be utilized as part of a hardware implementation of an Identity Based Encryption (IBE) scheme. The main computation, the Tate pairing in such a scheme in outlined and it is illustrated how it can be implemented on reconfigurable hardware using these components.


Elliptic Curve FPGA Implementation Tate Pairing Digit Serial Elliptic Curve Point 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • Tim Kerins
    • 1
  • Emanuel Popovici
    • 2
  • William Marnane
    • 1
  1. 1.Dept. of Electrical and Electronic EngineeringUniversity College CorkCork CityIreland
  2. 2.Dept. of Microelectronic EngineeringUniversity College CorkCork CityIreland

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