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Concurrent Error Detection Schemes for Involution Ciphers

  • Nikhil Joshi
  • Kaijie Wu
  • Ramesh Karri
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3156)

Abstract

Because of the rapidly shrinking dimensions in VLSI, transient and permanent faults arise and will continue to occur in the near future in increasing numbers. Since cryptographic chips are a consumer product produced in large quantities, cheap solutions for concurrent checking are needed. Concurrent Error Detection (CED) for cryptographic chips also has a great potential for detecting (deliberate) fault injection attacks where faults are injected into a cryptographic chip to break the key. In this paper we propose a low cost, low latency, time redundancy based CED technique for a class of symmetric block ciphers whose round functions are involutions. This CED technique can detect both permanent and transient faults with almost no time overhead. A function F is an involution if F(F(x))=x. The proposed CED architecture (i) exploits the involution property of the ciphers and checks if x=F(F(x)) for each of the involutional round functions to detect transient and permanent faults and (ii) uses the idle cycles in the design to achieve close to a 0% time overhead. Our preliminary ASIC synthesis experiment with the involutional cipher KHAZAD resulted in an area overhead of 23.8% and a throughput degradation of 8%. A fault injection based simulation shows that the proposed architecture detects all single-bit faults.

Keywords

Concurrent Error Detection (CED) Fault Tolerance Involutional ciphers KHAZAD 

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Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • Nikhil Joshi
    • 1
  • Kaijie Wu
    • 1
  • Ramesh Karri
    • 1
  1. 1.Department of Electrical and Computer EngineeringPolytechnic UniversityBrooklynUSA

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