Design of AES Based on Dual Cipher and Composite Field
Recently, Barkan and Biham proposed the concept of dual ciphers and pointed out that there are 240 dual ciphers of AES (Dual AES). An interesting application of dual ciphers is to design a cipher which run faster than the original cipher. In this paper, we first generalize the dual AES and propose a complete setup procedure to determine all dual ciphers. Then, a hardware implementation of AES based on the combination of dual cipher and composite field is proposed. We demonstrate that our AES design not only offers better performance and smaller area requirement than the design proposed by Wolkerstorfer et al which uses a composite field only. Our results confirm Barkan et al.’s conjecture that it is possible to design an AES cipher more efficiency than ever.
KeywordsHardware Implementation Block Cipher Federal Information Processing Standard Iterative Circuit Pipeline Circuit
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- 1.National Institute of Standards and Technology (NIST). Advanced Encryption Standard (AES). FIPS Publication 197 (November 2001), Available at http://csrc.nist.gov/encryption/aes/index.html
- 5.Ichikawa, T., Kasuya, T., Matsui, M.: Hardware Evaluation of the AES Finalists. In: The Third Advanced Encryption Standard Candidate Conference, pp. 279–285 (2000), , Available at http://csrc.nist.gov/encryption/aes/round2/conf3/papers/15-tichikawa.pdf
- 10.Daemen, J., Rijmen, V.: The Design of Rijndael. Springer printed in Germany (2002)Google Scholar
- 12.MacWilliams, F.J., Sloane, N.J.A.: The Theory of Error-Correcting Codes. North- Holland Publishing Company, Amsterdam (1978)Google Scholar
- 13.Paar, C.: Efficient VLSI Architectures for Bit Parallel Computation in Galois Fields. PhD Thesis, Institute for Experimental Mathematics, University of Essen, Germany (1994)Google Scholar
- 14.Rijmen, V.: Efficient Implementation of the Rijndael S-box, Available at http://www.esat.kuleuven.ac.be/rijmen/rijndael
- 15.Standaert, F.-X., Rouvroy, G., Quisquater, J.-J., Legat, J.-D.: Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs. Accepted at Workshop on Cryptographic Hardware and Embedded Systems (CHES 2003) (September 2003)Google Scholar
- 16.Chen, K.Y., Chen, P.D., Laih, C.S.: Speed up AES with the modification of shift row table. Public Comments on the Draft Federal Information Processing Standard ( FIPS ) (2001)Google Scholar