# Full-Bridge ZVS-PWM Converter with Inductive Output Filter

Chapter
Part of the Power Systems book series (POWSYS)

## Abstract

In this chapter, the Full-Bridge Zero-Voltage-Switching Pulse-Width-Modulated (FB-ZVS-PWM) dc-dc converter with inductive output filter is studied. The chapter presents and describes the principle of operation of the power converter topology, the modulation strategy and the relevant waveforms. A quantitative analysis is provided, focused on obtaining the static gain and output characteristics. Subsequently, the commutation is analyzed and the main equations necessary for designing the commutation parameters are derived. Also included are numerical examples to illustrate the theoretical analysis, proposed exercises with solutions and numerical simulations.

## Keywords

Output Filter Inductor Relevant Waveforms Soft Commutation Commutation Capacitors Commutation Time Interval
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

## Nomenclature

Vi

Input DC voltage

Vo

Output DC voltage

Po

Output power

Co

Output filter capacitor

Lo

Output filter inductor

Ro

ZVS

Zero voltage switching

ϕ

Angle between the leading leg and the lagging leg

q

Static gain

D

Duty cycle

Def

Effective duty cycle

fs

Switching frequency

Ts

Switching period

td

n

Transformer turns ratio

$${\text{I}}^{\prime}_{\text{o}}$$

Output DC current referred to the transformer primary side

$${\text{v}}^{\prime}_{\text{o}} ({\text{V}}^{\prime}_{\text{o}} )$$

Output voltage referred to the transformer primary side and its average value

io

Output current

$${\text{I}}^{\prime}_{\text{o}} \left( {\overline{{{\text{I}}^{\prime}_{\text{o}} }} } \right)$$

Average output current referred to the transformer primary and its normalized value

$${\text{I}}^{\prime}_{{{\text{o}}\,{\text{crit}}}}$$

Critical average output current referred to the primary side

S1 and S3

S2 and S4

Switches in the lagging leg

vg1, vg2, vg3 and vg4

Switches S1, S2, S3 and S4 drive signals, respectively

D1, D2, D3 and D4

Diodes in anti-parallel to the switches (MOSFET—intrinsic diodes)

C1, C2, C3 and C4

Capacitors in parallel to the switches (MOSFET—intrinsic capacitors); C = C1 = C2 = C3 = C4

vC1, vC2, vC3 and vC4

Capacitors voltage

vC

Equivalent capacitors voltage

Lc

Transformer leakage inductance or an additional inductor, if necessary

iLc

Inductor current

ωo

Resonant frequency

z

Characteristic impedance

∆ and β

State plane angles

vab

Full bridge ac voltage, between points “a” and “b”

vcb

Inductor voltage, between points “c” and “b”

vac

Voltage at the ac side of the rectifier, between points “a” and “c”

vS1, vS2, vS3 and vS4

Voltage across switches

iS1, iS2, iS3 and iS4

Current in the switches

iD1, iD2, iD3 and iD4

Current in the diodes

iC1, iC2, iC3 and iC4

Current in the capacitors

∆T

Time interval which vab = ±Vi

∆t1

Time interval of the first step of operation in CCM

∆t2

Time interval of the second step of operation in CCM

∆t3

Time interval of the third step of operation in CCM

∆t4

Time interval of the fourth step of operation in CCM

∆t5

Time interval of the fifth step of operation in CCM

∆t6

Time interval of the six step of operation in CCM

∆t7

Time interval of the seventh step of operation in CCM

∆t8

Time interval of the eighth step of operation in CCM

IS13 RMS$$\left( {\overline{{{\text{I}}_{{{\text{S}}13\,{\text{RMS}}}} }} } \right)$$

Switches S1 and S3 RMS current and its normalized value

IS24 RMS$$\left( {\overline{{{\text{I}}_{{{\text{S}}24\,{\text{RMS}}}} }} } \right)$$

Switches S2 and S4 RMS current in CCM and its normalized value

ID13$$\left( {\overline{{{\text{I}}_{{{\text{D}}13}} }} } \right)$$

Diodes D1 and D3 average current and its normalized value

ID24$$\left( {\overline{{{\text{I}}_{{{\text{D}}24}} }} } \right)$$

Diodes D2 and D4 average current and its normalized value