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Arm Floating-Point Instructions

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Formal Verification of Floating-Point Hardware Design
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Abstract

The first Arm Floating-Point Accelerator, which appeared in 1993, resembled the x87 coprocessor in its use of an 80-bit EP register file. This was succeeded by the Vector Floating-Point (VFP) architecture, which included 64-bit registers implementing the single-, double-, and half-precision data formats. The NEON Advanced SIMD extension later added 128-bit instructions for media and signal processing applications.

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References

  1. Kaufmann, M., Moore, J S.: ACL2 web site. http://www.cs.utexas.edu/users/moore/acl2/

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Russinoff, D.M. (2019). Arm Floating-Point Instructions. In: Formal Verification of Floating-Point Hardware Design. Springer, Cham. https://doi.org/10.1007/978-3-319-95513-1_14

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  • DOI: https://doi.org/10.1007/978-3-319-95513-1_14

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-95512-4

  • Online ISBN: 978-3-319-95513-1

  • eBook Packages: EngineeringEngineering (R0)

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