Abstract
The extreme integration levels reached by the silicon manufacturing process allowed the design of high-performance multi-core processors that meet the ever-increasing requirements of software applications. Unfortunately, we are living in the post Dennard’ scaling era, which is characterized by an increasing on-chip power density. This is pushing the problem of dissipating the heat generated by the processor up the next level: the current MOSFET geometry is decreasing the reliability of silicon devices, i.e., it is making them increasingly susceptible to thermal stress and manufacturing defects. In turn, this leads to computing devices that are more likely to experience faults and performance variability issues.
To prevent, mitigate, and compensate the aforementioned undesired behaviors, modern systems must rely on a sophisticated run-time support. In this section, we detail how it is done by the HARPA-OS.
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References
Bienia, C., Kumar, S., Singh, J., & Li, K. (2008) The parsec benchmark suite: Characterization and architectural implications. In Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques (pp. 72–81). New York: ACM.
Bolchini, C., Carminati, M., Gribaudo, M., & Miele, A. (2015) Task scheduling strategies to mitigate hardware variability in embedded shared memory clusters. In DAC.
Che, S., Boyer, M., Meng, J., Tarjan, D., Sheaffer, J. W., Lee, S.-H., et al. (2009). Rodinia: A benchmark suite for heterogeneous computing. In IISWC 2009. IEEE International Symposium on Workload Characterization, 2009 (pp. 44–54).
Chou, C. L., & Marculescu, R. (2011, March). Farm: Fault-aware resource management in NoC-based multiprocessor platforms. In 2011 Design, Automation Test in Europe (pp. 1–6).
Haghbayan, M. H., Miele, A., Rahmani, A. M., Liljeberg, P., & Tenhunen, H. (2016, March). A lifetime-aware runtime mapping approach for many-core systems in the dark silicon era. In 2016 Design, Automation Test in Europe Conference Exhibition (DATE) (pp. 854–857).
Hartman, A. S., & Thomas, D. E. (2012). Lifetime improvement through runtime wear-based task mapping. In Proceedings of the Eighth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis. CODES+ISSS 2018 (pp. 13–22). New York: ACM. Available: http://doi.acm.org/10.1145/2380445.2380455
Huang, L., Yuan, F., & Xu, Q. (2009, April). Lifetime reliability-aware task allocation and scheduling for MPSoC platforms. In 2009 Design, Automation Test in Europe Conference Exhibition (pp. 51–56).
Massari, G., Libutti, S., Portero, A., Vavrik, R., Kuchar, S., Vondrak, V., et al. (2015, August). Harnessing performance variability: A HPC-oriented application scenario. In 2015 Euromicro Conference on Digital System Design (DSD) (pp. 111–116).
Mercati, P., Paterna, F., Bartolini, A., Benini, L., & Rosing, T. (2016). Warm: Workload-aware reliability management in Linux/Android. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, PP(99), 1.
Stathis, J. H., & Zafar, S. (2006). The negative bias temperature instability in MOS devices: A review. Microelectronics Reliability, 46(2), 270–286.
Sun, J., Lysecky, R., Shankar, K., Kodi, A., Louri, A., & Roveda, J. (2014). Workload assignment considering NBTI degradation in multicore systems. Journal on Emerging Technologies in Computing Systems, 10(1), 4:1–4:22. Available: http://doi.acm.org/10.1145/2539124.
Wang, Z., & Ranka, S. (2010). Thermal constrained workload distribution for maximizing throughput on multi-core processors. In 2010 International Green Computing Conference (pp. 291–298).
Zhuravlev, S., Saez, J. C., Blagodurov, S., Fedorova, A., & Prieto, M. (2012). Survey of scheduling techniques for addressing shared resources in multicore processors. ACM Computing Surveys (CSUR), 45(1), 4.
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Libutti, S., Massari, G., Fornaciari, W. (2019). The HARPA-OS. In: Fornaciari, W., Soudris, D. (eds) Harnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms. Springer, Cham. https://doi.org/10.1007/978-3-319-91962-1_4
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DOI: https://doi.org/10.1007/978-3-319-91962-1_4
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