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Assuring Virtual PLC in the Context of SysML Models

  • Mounifah Alenazi
  • Deepak Reddy
  • Nan NiuEmail author
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10826)

Abstract

In complex industrial projects, textual information has been recognized as an important factor for automatically recovering trace links in software development. The goal of this paper is to empirically investigate if the trace links in the simulation result can assist in validating a virtual Programmable Logic Controller (PLC) in the context of System Modeling Language (SysML). We integrate the concept of obstacle analysis to recover situations in which a safety requirement will not be satisfied. Therefore, we use fault tree analysis to validate the safety requirements, and further use the elements of the fault tree to evaluate the quality of the automatically recovered trace links. We showed that the identified impacts of assuring virtual PLC (V-PLC) elements using traceability information can be reused to ensure a number of other PLCs or requirements in the systems models. This paper presents our experience of applying our approach using an automatic transmission systems built in SysML models.

Keywords

Systems Modeling Language (SysML) Programmable Logic Controller (PLC) Trace links Natural Language Processing (NLP) similarity measures Fault Tree Analysis 

Notes

Acknowledgments

This research is partially supported by the U.S. National Science Foundation (Award CCF-1350487).

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Copyright information

© Springer International Publishing AG, part of Springer Nature 2018

Authors and Affiliations

  1. 1.Department of Electrical Engineering and Computer ScienceUniversity of CincinnatiCincinnatiUSA

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