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Emerging Steep-Slope Devices and Circuits: Opportunities and Challenges

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Beyond-CMOS Technologies for Next Generation Computer Design

Abstract

While continuing the CMOS scaling-down becomes unprecedentedly more challenging than before, intensive exploration on beyond-CMOS nanodevice technologies is an appealing approach to further continue the power scaling-down. This chapter reviews some promising beyond-CMOS emerging transistor technologies, including Tunnel FETs, Ferroelectric FETs, and Hyper-FETs. Circuit design techniques based on these emerging devices are also reviewed to provide insights for future energy-efficient analog and digital signal processing. In addition to the opportunities, this chapter also discusses the challenges of emerging devices in circuit and systems.

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Notes

  1. 1.

    For conventional MOSFETs, the required minimum VDS to meet the saturation requirement is around VGS – VTH. For HTFETs, a widely-accepted VTH is not yet defined. This statement of comparison, however, is still meaningful, because for HTFETs, the required VDS needs to be larger than VGS to enable saturation, which is intuitively much larger than that of conventional MOSFETs [37, 41].

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Acknowledgment

This work is supported in part by the Center for Low Energy Systems Technology (LEAST), one of the six SRC STARnet centers, sponsored by MARCO and DARPA, by NSF awards 1160483 (ASSIST), and NSF Expeditions in Computing Award-1317560.

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Li, X. et al. (2019). Emerging Steep-Slope Devices and Circuits: Opportunities and Challenges. In: Topaloglu, R., Wong, HS. (eds) Beyond-CMOS Technologies for Next Generation Computer Design . Springer, Cham. https://doi.org/10.1007/978-3-319-90385-9_6

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