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Parallel Inductive Logic Programming System for Superlinear Speedup

  • Hiroyuki NishiyamaEmail author
  • Hayato OhwadaEmail author
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10759)

Abstract

In this study, we improve our parallel inductive logic programming (ILP) system to enable superlinear speedup. This improvement redesigns several features of our ILP learning system and parallel mechanism. The redesigned ILP learning system searches and gathers all rules that have the same evaluation. The redesigned parallel mechanism adds a communication protocol for sharing the evaluation of the identified rules, thereby realizing superlinear speedup.

Notes

Acknowledgments

This research was supported by grants from the Project of the Bio-oriented Technology Research Advancement Institution, NARO (the special scheme project on advanced research and development for next-generation technology).

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Copyright information

© Springer International Publishing AG, part of Springer Nature 2018

Authors and Affiliations

  1. 1.Faculty of Science and TechnologyTokyo University of ScienceNoda-shiJapan

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