Migrating a Complex Industry to Cloud

  • Naresh Kumar Sehgal
  • Pramod Chandra P. Bhatt


Many established industries face a dilemma about Cloud migration, as the ROI (Return on Investment) of such an effort is not clear. The EDA (Electronics Design Automation) industry’s software, tool methodologies, and flows and scripts for VLSI design have evolved from individual programs on mainframe computers, through collections of tools on engineering workstations, to complete suites of tools with associated methodologies on networks of computers. Design automation is one of the reasons why computer chips with upward of billions of transistors can be designed. One can assert that the server farms that form the back end of the Cloud would not have been around without the EDA industry. Thus, it is interesting to see whether Cloud Computing can, in turn, facilitate future growth of the EDA industry. Based upon a previous categorization of Cloud Computing workloads, this chapter maps the sub-tasks of an example silicon design flow to the types of workloads. The mapping of workloads is applicable to both Private Cloud Computing and Public Cloud Computing. This mapping can serve as an example for EDA companies and hardware design firms as they look to explore the Cloud for hardware design tasks. Our method can potentially open new doors and customer bases for enabling EDA growth. This chapter also provides examples of some early adopters, the issues they faced, and new emerging challenges, whether real or perceived. Additionally, some considerations are mentioned, such as licensing and delivery mechanisms that go beyond the mapping of tasks to workloads. The major contribution of this chapter is a proposed method for mapping EDA tools to Cloud Computing categories to facilitate the decision of which EDA tools are candidates for moving to the Cloud. Such a step is needed to migrate any established industry to adopt Cloud Computing.


  1. 1.
    NIST Special Publication 800-145Google Scholar
  2. 2.
    Ousterhout JK, Hamachi GT, Mayo RN, Scott WS, Taylor GS (1984) Magic: A VLSI layout system. In: 21st Design automation conference, pp 152–159Google Scholar
  3. 3.
    Nagel LW (1975) SPICE2: a computer program to simulate semiconductor circuits, ERL-M520. Electronics Research Laboratory, University of California, BerkeleyGoogle Scholar
  4. 4.
    Beebe S, Rotella F, Sahul Z, Yergeau D, McKenna G, So L, Yu Z, Wu KC, Kan E, McVittie J, Dutton RW (1994) Next Generation Stanford TCAD—PISCES 2ET and SUPREM OO7. In: IEDM 1994 proceedings, December 1994, San Francisco, CA, pp 213–216Google Scholar
  5. 5.
    Pinto MR, Rafferty CS, Dutton RW (1984) PISCES-II—Poisson and continuity equation solver. Stanford Electronics Laboratory Technical Report, Stanford UniversityGoogle Scholar
  6. 6.
    Acken JM, Stauffer JD (1979) Part 1: logic circuit simulation. IEEE Circuits and Systems Magazine, Mar 1979Google Scholar
  7. 7.
    Acken JM, Stauffer JD (1979) Part 2: logic Circuit Simulation. IEEE Circuits and Systems Magazine, June 1979Google Scholar
  8. 8.
    Szygenda SA (1972) TEGAS-anatomy of a general purpose test generation and simulation at the gate and functional level. In: Proceedings of 9th design automation Conference, pp 116–127Google Scholar
  9. 9.
    Bryant RE (1981) MOSSIM: a switch level simulator for MOS LSI. In: Proceedings of 18th design automation conference, pp 354–361Google Scholar
  10. 10.
    Goldstein LH (1979) Controllability/observability analysis of digital circuits. IEEE Trans Circ Syst 26(2)Google Scholar
  11. 11.
    Grason J (1979) TMEAS, a testability measurement program. In: Proceedings of 16th design automation conference, pp 156–161Google Scholar
  12. 12.
    Hachtel GD, Hemanchandra L, Newton R, Sangiovanni-Vincentelli A (1982) A comparison of logic minimization strategies using ESPRESSO: an APL program package for partitioned logic minimization. In Proceedings of the international symposium on circuits and systems, Rome, Italy, pp 42–48, Apr 1982Google Scholar
  13. 13.
    Preas B, Gwyn CW (1978) Methods for hierarchical automatic layout of custom LSI circuit masks. In: DAC 1978, pp 206–212Google Scholar
  14. 14.
    Sechen C, Sangiovanni A (1986) Timberwolf 3.2: a new standard cell placement and global routing package. In: 23rd DAC, pp 432–439Google Scholar
  15. 15.
  16. 16.
    Jamshidi P, Ahmad A, Pahl C (2013) Cloud migration research: a systematic review. IEEE Trans Cloud Comput 1(02):142–157Google Scholar
  17. 17.
    Guan H, Ma R, Li J (2014) Workload-aware credit scheduler for improving network I/O performance in virtualization environment. IEEE Trans Cloud Comput 2(2)Google Scholar
  18. 18.
    Moreno IS, Garraghan P, Townend P, Xu J (2014) Analysis, modeling and simulation of workload patterns in a large-scale utility cloud. IEEE Trans Cloud Comput 2(2)Google Scholar
  19. 19.
    Mulia WD, Sehgal N, Sohoni S, Acken JM, Lucas Stanberry C, Fritz DJ (2013) Cloud workload characterization. IETE Tech Rev 30(5)Google Scholar
  20. 20.
    Sehgal NK, Sohoni S, Xiong Y, Fritz D, Mulia W, Acken JM (2011) A cross section of the issues and research activities related to both information security and cloud computing. IETE Tech Rev 28(4):279–291Google Scholar
  21. 21.
  22. 22.
    Joyner W (2013) EDA: the first 25 years. Presented at the 50th design automation conference. Available:
  23. 23.
    Sehgal N, Chen CYR, Acken JM (1994) An object-oriented cell library manager. In: Proceedings of ICCAD, pp 750–753Google Scholar
  24. 24.
    Porter ME (2008) The five competitive forces that shape strategy. Harvard Business Review.
  25. 25.
    Kuehlmann A, Camposano R, Colgan J, Chilton J, George S, Griffith R, Leventis P, Singh D (2010) Does IC design have a future in the clouds? In: Design automation conference (DAC), 2010 47th ACM/IEEE, pp 412–414Google Scholar
  26. 26.
    Rutenbar R (2013) EDA: the Second 25 years. Presented at the 50th design automation conference.
  27. 27.
    Ghosh N, Ghosh SK, Das SK (2015) SelCSP: a framework to facilitate selection of cloud service providers. IEEE Trans Cloud Comput 3(1)Google Scholar
  28. 28.
    Ralph J. Challenges in cloud computing for EDA. Chip Design Magazine,
  29. 29.
    Stok L (213) EDA: the next 25 years. Presented at the 50th design automation conference. Available [Online]:
  30. 30.
    Ficco M, Rak M (2015) Stealthy denial of service strategy in cloud computing. IEEE Trans Cloud Comput 3(1)Google Scholar
  31. 31.
    Brayton R, Cong J (2010) NSF workshop on EDA: past, present and future. IEEE Des Test Comput, pp. 68–74Google Scholar
  32. 32.
  33. 33.
  34. 34.
  35. 35.
  36. 36.
    Elliott M (2013) Productonica: cloud clears way to IC testing. Electronic specifier, 13 Nov 2013., June 2015
  37. 37.
  38. 38.
    Schwaderer C (2014) EDA and the cloud. Embedded computing design, May 2014.
  39. 39.
    Trigueros-Preciado S, Perez-Gonzalez D, Solana-Gonzalez P (2013) Cloud computing in industrial SMEs: identification of the barriers to its adoption and effects of its application. Electr Markets 23(2):105–114CrossRefGoogle Scholar
  40. 40.
  41. 41.
    B. Schneier, “The Hidden Battles to Collect Your Data and Control Your World,” March 2015,

Copyright information

© Springer International Publishing AG, part of Springer Nature 2018

Authors and Affiliations

  • Naresh Kumar Sehgal
    • 1
  • Pramod Chandra P. Bhatt
    • 2
  1. 1.Santa ClaraUSA
  2. 2.BangaloreIndia

Personalised recommendations