Accurate Linearity Testing Using Low-Purity Stimulus Robust against Flicker Noise

Abstract

Accurately characterizing linearity performance of high-resolution analog-to-digital converters (ADCs) has been a challenging task for many years, since providing input signals whose purity is beyond ADC under test becomes more difficult as the ADC performance becomes better. Previously, the stimulus error identification and removal (SEIR) method used two low-purity ramps with an offset in between. It can achieve accurate linearity test results for a high-precision ADC, but it is vulnerable to flicker noise inherited in the input signals. This chapter proposes two novel methods that eliminate the influence of flicker noise and accurately obtain linearity performance of ADC under test. Using only −40 to −70 dB purity sinusoidal signals, or simple interleaved ramps, the proposed methods are easier to implement and can tolerate the influence of flicker noise while achieving about one least significant bit (LSB) estimation error—the similar level when a pure sinusoidal is used for the same ADC linearity test. The proposed methods are analyzed in detail and comparisons are made between the previous SEIR method. The effectiveness and robustness of the proposed methods against flicker noise are verified through various simulations. The proposed methods help reduce production test cost and simplify the test setup for high-resolution ADC linearity test, suitable for cost-effective on-chip implementation.