Circuit Biasing Using Fixator-Norator Pairs—A Tutorial

  • Reza Hashemian
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 479)


A procedure based on local biasing is presented in this chapter. This procedure initiates from port nullification and extends to nonlinear device nullification. It is shown that when a device internally powered but is nullified through its ports it is locally biased. A device can be locally biasing with full supplies, or with reduced number of supplies, and the differences are discussed. The main advantage of local biasing of a device is separating it from the rest of the circuit and bias it individually based on its requirements. Disadvantages of local biasing, however, is its practicality, requiring numerous supply sources and in disarrays. The solution presented here is biasing through the use of fixator-norator pairs (FNPs). By using FNP we are able to fix each transistor to its designated operating point, just like local biasing, while the power supplies remain in their normal location in the circuit (global biasing). Properties on fixators and norators are discussed and component modeling using FNPs are introduced. These models are of two types, linear and nonlinear. The effort in this chapter has been on making it a tutorial on the subject, and this has been done through several examples. The examples start from simple circuits and move into more elaborate integrated circuits.


Amplifiers Analog circuit design Biasing design Fixator-norator pairs Local biasing Nullification 


  1. 1.
    Jaeger RC, Blalock TN (2008) Microelectronic circuit design, 3rd edn. Mc Graw-Hill Higher Education, New YorkGoogle Scholar
  2. 2.
    Baker RJ (2008) CMOS, circuit design, layout, and simulation, 2nd edn. IEEE Press, Wiley Interscience, Piscataway, pp 613–823Google Scholar
  3. 3.
    Verhoeven CJ, van Staveren A, Monna GLE, Kouwenhoven MHL, Yildiz E (2003) Structured electronic design: negative-feedback amplifiers. Kluwer Academic Publishers, The NetherlandsCrossRefzbMATHGoogle Scholar
  4. 4.
    Hashemian R (2006) Analog circuit design with linearized DC biasing. In: Proceedings of the 2006 IEEE international conference on electro/information technology, Michigan State University, Lancing, MI, 7–10 May 2006Google Scholar
  5. 5.
    Hashemian R (2006) Designing analog circuits with reduced biasing power. In: Proceedings of the 13th IEEE international conference on electronics, circuits and systems, Nice, France, 10–13 December 2006Google Scholar
  6. 6.
    Pillage TL, Rohrer RA, Visweswariah C (1995) Electronic circuit & system simulation methods. McGraw-Hill Inc, New YorkGoogle Scholar
  7. 7.
    Kumar R, Senani R (2002) Bibliography on nullor and their applications in circuit analysis, synthesis and design. Analog Integr Circuit Signal Process. Kluwer Academic PublicationsGoogle Scholar
  8. 8.
    Schmid H (2000) Approximating the universal active element. IEEE Trans Circuits Syst II 47(11):1160–1169CrossRefGoogle Scholar
  9. 9.
    Tlelo-Cuautle E, Duarte-Villasenor MA, Reyes-Garcia CA, Fakhfakh M, Loulou M, Sanchez-Lopez C, Reyes-Salgado G (2007) Designing VFs by applying genetic algorithms from nullator-based descriptions. In: ECCTD 2007, 18th European conference on circuit theory and design, 27–30 August 2007, pp 555–558Google Scholar
  10. 10.
    Tlelo-Cuautle E, Sarmiento-Reyes LA (2000) Biasing analog circuits using the nullor concept. In: Southwest symposium on mixed-signal designGoogle Scholar
  11. 11.
    Tlelo-Cuautle E (2002) An efficient biasing technique suitable for any kind of the four basic amplifiers designed at nullor level. In: IEEE international symposium on circuits and systems, 2002. ISCAS 2002, 26–29 May 2002, vol 3, pp III-535–III-538Google Scholar
  12. 12.
    Haigh DG, Clarke TJW, Radmore PM (2006) Symbolic framework for linear active circuits based on port equivalence using limit variables. IEEE Trans Circuits Syst I Regul Pap 53(9):2011–2024MathSciNetCrossRefzbMATHGoogle Scholar
  13. 13.
    Haigh DG, Radmore PM (2006) Admittance matrix models for the nullor using limit variables and their application to circuit design. IEEE Trans Circuits Syst I Regul Pap 53(10):2214–2223MathSciNetCrossRefzbMATHGoogle Scholar
  14. 14.
    Haigh DG (2006) A method of transformation from symbolic transfer function to active-RC circuit by admittance matrix expansion. IEEE Trans Circuits Syst I Regul Pap 53(12):2715–2728MathSciNetCrossRefzbMATHGoogle Scholar
  15. 15.
    Beccari C (2001) Transmission zeros, Departimento di Electronica, Turin Instisute of Technology, Turino, Italy, 6 December 2001Google Scholar
  16. 16.
    Broz J, Dreyer M, Halfmann T, Hennig E, Thole M, Wichmann T (2000–2005) Intelligent Symbolic Design System, by Fraunhofer-Institut f¨ur Techno- und Wirtschaftsmathematik (ITWM).
  17. 17.
    Hashemian R (2008) Local biasing and the use of nullator-norator pairs in analog circuit design. In: Proceedings of the 2008 IEEE international midwest symposium on circuits and systems, Knoxville, TN, 10–13 August 2008Google Scholar
  18. 18.
    Hashemian R (2009) Hybrid equivalent circuit, an alternative to thevenin and norton equivalents, its properties and applications. In: Submitted for presentation at the 2009 IEEE midwest symposium on circuits and systems, Cancun, Mexico, 2–5 August 2009Google Scholar
  19. 19.
    Hashemian R (2014) Fixator-norator pairs vs direct analytical tools in performing analog circuit designs. IEEE Trans Circuits Syst II, Exp Briefs 61(80):569–573Google Scholar

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© Springer International Publishing AG, part of Springer Nature 2018

Authors and Affiliations

  1. 1.Department of Electrical EngineeringNorthern Illinois UniversityDeKalbUSA

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