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Circuit Analyses with Nullors

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Pathological Elements in Analog Circuit Design

Abstract

This chapter describes the nullor-based modelling of active devices from the circuit level of abstraction. After a brief overview on the nullor concept and its properties, the modelling of active devices not only at the voltage-mode but also at the current-mode and the mixed-mode of operation from two-port and four-terminal network point of view are described in details. The circuit analysis with nullors and the topological approach for transfer function generation by two-graph tree enumeration as well are presented. The generalized topological formula with homogeneous parameters is proved for all the circuit functions, and a simple representation of the four types of controlled sources by admittances is proposed, that allows a uniform treatment of the entire circuit in terms of admittances. In order to implement the procedure, the rules to automatically generate the two graphs and to enumerate the common spanning trees are presented. Some simplifications in the circuit and in the two graph structure before tree generation and a graph representation on levels, improve the efficiency of the tree enumeration procedure. The original approach, in which each edge is labelled with an admittance term, could handle only one type of active element, namely VCCS (voltage controlled current source), but the method was further developed by many researchers for general linear circuits to include virtually all active elements. Some techniques to convert the CCVSs (current controlled voltage sources), VCVSs (voltage controlled voltage sources) and CCCSs (current controlled current sources) in equivalent schemes containing only VCCSs together with admittances and the inductance modelling proposed in the literature are discussed.

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References

  1. Fakhfakh M, Tlelo-Cuautle E, Fernandez FV (eds) (2012) Design of analog circuits through symbolic analysis. Bentham Science Publishers, pp. 83–114, 228–262 (Respectively e-book). https://doi.org/10.2174/97816080509561120101, ISBN: 9781-60805-095-6

  2. Vlach J, Singhal K (1993) Computer methods for circuit analysis and design. Kluwer, Norwell, Massachusetts

    Google Scholar 

  3. Gielen G, Sansen W (1991) Symbolic analysis for automated design of analog integrated circuits. Kluwer Academic Publishers, USA

    Book  Google Scholar 

  4. Fernández FV, Rodriguez-Vázquez A, Huertas JL, Gielen G (1998) Symbolic analysis techniques: applications to analog design automation. IEEE Press, Piscataway, NJ

    Book  Google Scholar 

  5. Carlin HJ (1964) Singular networks elements. IEEE Trans Circuit Theory 11:67–72

    Article  Google Scholar 

  6. Dumitriu L, Lordache M (1998) Teoria modernă a circuitelor electrice—Fundamentare teoretică, Aplicaţii, Algoritmi şi Programe de calcul, vol 1, Editura All Educational S.A., Bucureşti, ISBN 973–9337–99– 6

    Google Scholar 

  7. Lordache M, Dumitriu L (2006) The generalized topological formula for transfer functions’ generation by two-graph tree enumeration. Analog Integr Circ Sig Process 47(1): 85–100. Kluwer Academic Publishers

    Google Scholar 

  8. Mayeda W (1972) Graph theory. Wiley, New York

    MATH  Google Scholar 

  9. Lordache M (1980) Generalization of the topological formulas with homogeneous parameters. Rev Roum Sci Techn Électrotechn et Énerg 4:501–513

    Google Scholar 

  10. Cristea P, Lordache M, Dumitriu L, Spinei F (1995) On tree generation diakoptic method used in circuit symbolic analysis. In: Proceedings of European Conference on Circuit Theory and Design, ECCTD’95, Istanbul, Turkey, Vol II, 27–31 Aug 1995, pp 625–635

    Google Scholar 

  11. Lordache M, Dumitriu L (1997) Symbolic analysis of large analog integrated circuits using a two-graph tree enumeration method. In: Proceedings of European Conference on Circuit Theory and Design, ECCTD’97, Budapest, Hungary, pp 468–473

    Google Scholar 

  12. Lordache M, Dumitriu L (1997) An approximation symbolic analysis of large analog integrated circuits. Rev Roum Sci Techn Electrotechn et Energ 42(4):445–458, Bucharest

    Google Scholar 

  13. Lordache M, Dumitriu L, Muntean R, Botinant R (1998) An algorithm for finding all spanning trees in increasing weight order. In: Proceedings of Symbolic Methods and Applications in Circuit Design, SMACD’98, Kaiserslautern, Germany, 8–9 Oct 1998, pp 99–105

    Google Scholar 

  14. Dumitriu L, Lordache M, Muntean R, Botinant R (1998) Efficient generation of symbolic network functions using two-graph decomposition on levels. In: Proceedings of Symbolic Methods and Applications in Circuit Design, SMACD’98, Kaiserslautern, Germany, 8–9 Oct 1998, pp 191–198

    Google Scholar 

  15. Dumitriu L, Lordache M (1999) Techniques for fast symbolic analysis of large analogue integrated circuits. In: Proceedings of Signals, Circuits and Systems, SCS’ 99, Iasi, Romania, 6–8 July 1999, pp 57–60

    Google Scholar 

  16. Mayeda W, Seshu S (1965) Generation of trees without duplications. IEEE Trans Circuit Theory CT-12(12):181–185

    Google Scholar 

  17. Yu Q, Sechen C (1996) A unified approach to the approximation symbolic analysis of large analog integrated circuits. IEEE Trans Circuits Syst I Fundam Theory Appli 43(8):656–669

    Google Scholar 

  18. Lin PM (1991) Symbolic network analysis. Elsevier, Amsterdam, Oxford, New York, Tokyo

    Google Scholar 

  19. Rodanski B (2002) Extension of the two-graph method for symbolic analysis of circuits with non-admittance elements. In: Proceedings of Symbolic Methods and Applications in Circuit Design, SMACD’02, Sinaia, Romania, 10–11 Oct 2002, pp 17–20

    Google Scholar 

  20. Gielen G, Sansen W (1991) Symbolic analysis for automated design of analog integrated circuits. Kluwer Academic, Boston, MA

    Book  Google Scholar 

  21. Dumitriu L, Lordache M (2003) Efficient procedures for the automatic generation of transfer functions in symbolic form by two-graph tree enumeration. In: Proceedings of the European Conference on Circuit Theory and Design, ECCTD’03, Cracow, Poland, 1–4 Sept 2003, pp II-398–II-401

    Google Scholar 

  22. Jayakumar R, Thulasiraman K, Swamy MNS (1984) Complexity of computation of a spanning tree enumeration algorithm. IEEE Trans Circuits Syst CAS-31(10):853–860

    Google Scholar 

  23. Jayakumar R, Thulasiraman K, Swamy MNS (1989) MOD-CHAR: an implementation of char’s spanning tree enumeration algorithm and its complexity analysis. IEEE Trans Circuits Syst 36(2):219–228

    Google Scholar 

  24. Galan M, Fernandez FV, Vazquez AR (1997) A New 3-Matroid Intersection Algorithm for Simplification During Generation in Symbolic Analysis of Large Analog Circuits. In: Proceedings of European Conference on Circuit Theory and Design, ECCTD’97, Budapest, Hungary, pp 1310–1315

    Google Scholar 

  25. Verhagen W, Gielen G (1998) An efficient evaluation scheme for linear transfer functions using the determinant decision diagram representation of the system determinant. In: Proceedings of the Fifth International Workshop on Symbolic Methods and applications in Circuit Design, SMACD’98, Kaiserslautern, Germany, 8–9 Oct 1998, pp 99–105

    Google Scholar 

  26. Rodriguez-Garcia JD, Guerra O,Roca E, Fernandez FV, Vazquez AR (1998) A new simplification before and during generation algorithm. In: Proceedings of the Fifth International Workshop on Symbolic Methods and Applications in Circuit Design, SMACD’98, Kaiserslautern, Germany, 8–9 Oct 1998, pp 110–124

    Google Scholar 

  27. Galan M, Fernandez FV, Vazquez AR (1997) Comparison of matroid intersection algorithms for large circuit analysis. In: Proceedings of the IEEE International Symposium on Circuits and Systems, ISCAS’97, Hong Kong, 9–12 June 1997, pp 1784–1787

    Google Scholar 

  28. Lordache M, Dumitriu L (2014) Computer-aided simulation of analogue circuits: algorithms and computational techniques. POLITEHNICA Press Publishing, Bucharest

    Google Scholar 

  29. Iordache M (2015) Symbolic, numeric—symbolic and numeric simulation of analog circuits—user guides. MATRIX ROM Publishing, Bucharest in ROM

    Google Scholar 

  30. Tellegen BDH (1966) On nullators and norators. IEEE Trans Circuit Theory CT-13:466–469

    Google Scholar 

  31. Carlosena A, Moschytz GS (1993) Nullators and norators in voltage to current mode transformations. Int J Circuit Theory Appl 21:421–424

    Article  Google Scholar 

  32. Sánchez-López C, Tlelo-Cuautle E (2005) Behavioral model generation for symbolic analysis of analog integrated circuits. In: IEEE International Symposium on Signals, Circuits and Systems, pp 327–330

    Google Scholar 

  33. Tlelo-Cuautle E, Sánchez-López C, Martínez-Romero E, Tan SXD (2010) Symbolic analysis of analog circuits containing voltage mirrors and current mirrors. Analog Integr Circ Sig Process https://doi.org/10.1007/s10470-010-9455-y

  34. Tlelo-Cuautle E, Martinez-Romero E, Sánchez-López C, Tan SXD (2009) Symbolic formulation method for mixed-mode analog circuits using nullors. In IEEE International Conference on Electronics, Circuits and Systems, pp 856–859

    Google Scholar 

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Correspondence to Mihai Iordache .

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Iordache, M., Dumitriu, L., Niculae, D., Stanculescu, M., Bucata, V., Rezmerita, G. (2018). Circuit Analyses with Nullors. In: Fakhfakh, M., Pierzchala, M. (eds) Pathological Elements in Analog Circuit Design. Lecture Notes in Electrical Engineering, vol 479. Springer, Cham. https://doi.org/10.1007/978-3-319-75157-3_4

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  • DOI: https://doi.org/10.1007/978-3-319-75157-3_4

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