Extraction Tool for the Substrate Network

  • Pietro Buccella
  • Camillo Stefanucci
  • Maher Kayal
  • Jean-Michel Sallese
Part of the Analog Circuits and Signal Processing book series (ACSP)


This chapter presents a tool to extract the model of the substrate for arbitrary integrated circuit layouts. The core extraction algorithm is based on the subdivision of the substrate into a user-specified number of optimized rectilinear grid cells. The rectilinear mesh divides the IC layout into smaller volume elements where the continuity equation for minority carriers is solved with the FDM. In order to reduce the network complexity, the IC layout is subdivided into regions of opposite doping types. Each region is meshed with a rectilinear grid. An electrical node is defined inside each element of the mesh, so that PN junctions result in connecting two adjacent regions of opposite doping, while resistors and homojunctions are formed by connecting cells of the same doping type. The tool is implemented in a set of modules that simplify the IC layout, generate a mesh, extract the equivalent substrate 3D network, link the substrate model with the circuit, and analyze simulations output.


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Copyright information

© Springer International Publishing AG, part of Springer Nature 2018

Authors and Affiliations

  • Pietro Buccella
    • 1
  • Camillo Stefanucci
    • 1
  • Maher Kayal
    • 1
  • Jean-Michel Sallese
    • 2
  1. 1.STI IEL GR-KAÉcole Polytechnique Fédérale de LausanneLausanneSwitzerland
  2. 2.STI IEL EDALBÉcole Polytechnique Fédérale de LausanneLausanneSwitzerland

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