Design Challenges in High-Voltage ICs

  • Pietro Buccella
  • Camillo Stefanucci
  • Maher Kayal
  • Jean-Michel Sallese
Part of the Analog Circuits and Signal Processing book series (ACSP)


This chapter presents the design challenges regarding substrate couplings due to parasitic substrate bipolar transistors in HV ICs. The basic characteristics of HV technologies and substrate parasitic bipolar structures are identified and organized to demonstrate the main trade-offs that designers have to face. Moreover, representative circuit topologies are analyzed to show how such substrate parasitic transistors can be activated in real-world applications, pointing out the usefulness of an adequate substrate model to avoid failures that are hard to predict. The final part of this chapter is devoted to the identification of specific cases where substrate currents adversely affect the functionality of circuits.


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Copyright information

© Springer International Publishing AG, part of Springer Nature 2018

Authors and Affiliations

  • Pietro Buccella
    • 1
  • Camillo Stefanucci
    • 1
  • Maher Kayal
    • 1
  • Jean-Michel Sallese
    • 2
  1. 1.STI IEL GR-KAÉcole Polytechnique Fédérale de LausanneLausanneSwitzerland
  2. 2.STI IEL EDALBÉcole Polytechnique Fédérale de LausanneLausanneSwitzerland

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