An Analog Probabilistic Spiking Neural Network with On-Chip Learning
Portable or biomedical applications typically require signal processing, learning, and classification in conditions involving limited area and power consumption. Analog implementations of learning algorithms can satisfy these requirements and are thus attracting increasing attention. Probabilistic spiking neural network (PSNN) is a hardware friendly algorithm that is relax in weight resolution requirements and insensitive to noise and VLSI process variation. In this study, the probabilistic spiking neural network was implemented using analog very-large-scale integration (VLSI) to verify their hardware compatibility. The circuit was fabricated using 0.18 μm CMOS technology. The power consumption of the chip was less than 10 μW with a 1 V supply and the core area of chip was 0.43 mm2. The chip can classify the electronic nose data with 92.3% accuracy and classify the electrocardiography data with 100% accuracy. The low power and high learning performance features make the chip suitable for portable or biomedical applications.
KeywordsProbabilistic spiking neural network (PSNN) Analog implementation On-Chip learning
This work was supported in part by Ministry of Science and Technology, under Contract No. MOST 106-2221-E-007-119.
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