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On the Scalability of Data Reduction Techniques in Current and Upcoming HPC Systems from an Application Perspective

Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10524)

Abstract

We implement and benchmark parallel I/O methods for the fully-manycore driven particle-in-cell code PIConGPU. Identifying throughput and overall I/O size as a major challenge for applications on today’s and future HPC systems, we present a scaling law characterizing performance bottlenecks in state-of-the-art approaches for data reduction. Consequently, we propose, implement and verify multi-threaded data-transformations for the I/O library ADIOS as a feasible way to trade underutilized host-side compute potential on heterogeneous systems for reduced I/O latency.

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Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  1. 1.Helmholtz-Zentrum Dresden – RossendorfDresdenGermany
  2. 2.Technische Universität DresdenDresdenGermany
  3. 3.NVIDIA ARC GmbHBerlinGermany
  4. 4.Oak Ridge National LaboratoryOak RidgeUSA

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