TeLEx: Passive STL Learning Using Only Positive Examples

  • Susmit Jha
  • Ashish Tiwari
  • Sanjit A. Seshia
  • Tuhin Sahai
  • Natarajan Shankar
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10548)

Abstract

We propose a novel passive learning approach, TeLEx, to infer signal temporal logic formulas that characterize the behavior of a dynamical system using only observed signal traces of the system. The approach requires two inputs: a set of observed traces and a template Signal Temporal Logic (STL) formula. The unknown parameters in the template can include time-bounds of the temporal operators, as well as the thresholds in the inequality predicates. TeLEx finds the value of the unknown parameters such that the synthesized STL property is satisfied by all the provided traces and it is tight. This requirement of tightness is essential to generating interesting properties when only positive examples are provided and there is no option to actively query the dynamical system to discover the boundaries of legal behavior. We propose a novel quantitative semantics for satisfaction of STL properties which enables TeLEx to learn tight STL properties without multidimensional optimization. The proposed new metric is also smooth. This is critical to enable use of gradient-based numerical optimization engines and it produces a 30\(\times \)–100\(\times \) speed-up with respect to the state-of-art gradient-free optimization. The approach is implemented in a publicly available tool.

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Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  • Susmit Jha
    • 1
  • Ashish Tiwari
    • 1
  • Sanjit A. Seshia
    • 2
  • Tuhin Sahai
    • 3
  • Natarajan Shankar
    • 1
  1. 1.CSLSRI InternationalMenlo ParkUSA
  2. 2.EECSUC BerkeleyBerkeleyUSA
  3. 3.United Technologies Research CenterEast HartfordUSA

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