Skip to main content

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 580))

  • 1156 Accesses

Abstract

Convolution neural network has important applications in the field of image recognition and retrieval, face recognition and object detection in deep learning. In the training of convolution neural network, 2D convolution, spatial pooling, linear mapping and other operations of forward propagation will have a huge computational complexity. In this paper, an effective optimization technique is proposed to map the convolutional neural network to the digital processor DSP. These technologies include: fixed-point conversion, data reorganization, weight deployment and LUT (look-up table). These technologies enable us to optimize the use of resources on the C66x DSP. The experiment is carried out on Texas Instruments C6678 development board, and the optimization technique proposed in this paper can be applied to multiple open-source network topologies.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 169.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 219.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. LeCun, Y., Bottou, L., Bengio, Y., Haffner, P.: Gradient-based learning applied to document recognition. In: Proceedings of the IEEE (1998)

    Google Scholar 

  2. LeCun, Y., et al.: CNP: An FPGA-based Processor for Convolutional Networks (2009)

    Google Scholar 

  3. A 240 G-ops/s Mobile Coprocessor for Deep Neural Networks (2013)

    Google Scholar 

  4. Putnam, A., et al.: A reconfigurable fabric for accelerating large-scale datacenter services. In: International Symposium on Computer Architecture (2014)

    Google Scholar 

  5. Jagath, A.: FPGA Implementations of Neural Networks. Springer (2006)

    Google Scholar 

  6. Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks. ACM 978-1-4503-3315-3/15/02 (2015)

    Google Scholar 

  7. Accelerating Deep Convolutional Neural Networks Using Specialized Hardware (2015)

    Google Scholar 

  8. Krizhevsky, A., Sutskever, I., Hinton, G.E.: Imagenet classification with deep convolutional neural networks. In: NIPS (2012)

    Google Scholar 

  9. Cong, J., Xiao, B.: Minimizing computation in convolutional neural networks. In: ICANN (2014)

    Google Scholar 

  10. Courbariaux, M., David, J.-P.: Training deep neural networks with low precision multiplications (2015)

    Google Scholar 

  11. Gupta, S., Agrawal, A., Gopalakrishnan, K.: Deep Learing with Limited Numberical Precision (2015)

    Google Scholar 

  12. Vanhoucke, V., Senior, A.: Vanhoucke improveing the speed of neural network on CPUs (2011)

    Google Scholar 

  13. Chen, T., Du, Z., Sun, N.: A Small-Footprint High-Throughput Accelerator for Ubiquitous Machine-Learning

    Google Scholar 

  14. “2020 Roadmap, Rev. 1”, European New Car Assessment Programme (March 2015)

    Google Scholar 

  15. Krizhevsky, A., Sutskever, I., Hinton, G.E.: ImageNetClassification with Deep Convolutional Neural Network. NIPS (2012)

    Google Scholar 

  16. TDA3x SoC Processors for Advanced Driver Assist Systems (ADAS) Technical Brief. Texas Instruments Inc. (2014)

    Google Scholar 

  17. Sermanet, P., LeCun, Y.: Traffic sign recognition with multi-scale Convolutional Networks. In: International Joint Conference on Neural Networks (IJCNN) (2011)

    Google Scholar 

  18. Szegedy, C., Liu, W., Jia, Y., et al.: Going Deeper with Convolutions. In: IEEE Conference on Computer Vision and Pattern Recognition (CVPR) (2015)

    Google Scholar 

  19. “TMS320C66x DSP: User Guide”, SPRUGW0C. Texas InstrumentsInc. (2013)

    Google Scholar 

  20. Audhkhasi, K., Osoba, O., Kosko, B.: Noise benefits in backpropagation and deep bidirectional pre-training. In: 2013 International Joint Conference on Neural Networks (IJCNN), pp. 1–8. IEEE (2013)

    Google Scholar 

  21. Baboulin, M., Buttari, A., Dongarra, J., Kurzak, J., Langou, J., Langou, J., Luszczek, P., Tomov, S.: Accelerating scientific computations with mixed precision algorithms. Comput. Phys. Commun. 180(12), 2526–2533 (2009)

    Article  MATH  Google Scholar 

Download references

Acknowledgements

The authors of this paper are members of Shanghai Engineering Research Center of Intelligent Video Surveillance. In part by Technology Research Program of Ministry of Public Security of China under Grant 2015JSYJB26.

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to YuXin Cai .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2018 Springer International Publishing AG

About this paper

Cite this paper

Cai, Y., Liang, C., Tang, Z., Li, H. (2018). Optimization Technology of CNN Based on DSP. In: Abawajy, J., Choo, KK., Islam, R. (eds) International Conference on Applications and Techniques in Cyber Security and Intelligence. ATCI 2017. Advances in Intelligent Systems and Computing, vol 580. Edizioni della Normale, Cham. https://doi.org/10.1007/978-3-319-67071-3_9

Download citation

  • DOI: https://doi.org/10.1007/978-3-319-67071-3_9

  • Published:

  • Publisher Name: Edizioni della Normale, Cham

  • Print ISBN: 978-3-319-67070-6

  • Online ISBN: 978-3-319-67071-3

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics