Power Aware Standardization of Library

Abstract

Multivoltage (MV) based power aware (PA) design verification and implementation methodologies require special power management attributes in libraries for standard, MV and Macro cells for two distinctive reasons. The first aspect is to provide power and ground (also bias) supply or PG-pin information, which is mandatory for PA verification. The second reason is to provide a distinctive attribute between a special power management MV cell and a regular standard cell. The special MV cells include isolation (ISO), level-shifters (LS), enable level-shifter (ELS), always-on buffers (AOB), feed through buffers or repeaters (RPT), diode clamps, retention flops (RFF), power switches (PSW), multi- and single- rail Macros. This Chapter describes the standard requirements of Power Aware or PG-pin libraries and provides modeling examples of the MV cells from UPF based PA verification perspective.