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Double Buffering for MCDRAM on Second Generation \(\hbox {Intel}^{\circledR }\) Xeon Phi\(^{\text {TM}}\) Processors with OpenMP

  • Stephen L. OlivierEmail author
  • Simon D. Hammond
  • Alejandro Duran
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10468)

Abstract

Emerging novel architectures for shared memory parallel computing are incorporating increasingly creative innovations to deliver higher memory performance. A notable exemplar of this phenomenon is the Multi-Channel DRAM (MCDRAM) that is included in the \(\hbox {Intel}^{\circledR }\) XeonPhi\(^{\text {TM}}\) processors. In this paper, we examine techniques to use OpenMP to exploit the high bandwidth of MCDRAM by staging data. In particular, we implement double buffering using OpenMP sections and tasks to explicitly manage movement of data into MCDRAM. We compare our double-buffered approach to a non-buffered implementation and to Intel’s cache mode, in which the system manages the MCDRAM as a transparent cache. We also demonstrate the sensitivity of performance to parameters such as dataset size and the distribution of threads between compute and copy operations.

Notes

Acknowledgments

Sandia National Laboratories is a multimission laboratory managed and operated by National Technology and Engineering Solutions of Sandia, LLC., a wholly owned subsidiary of Honeywell International, Inc., for the U.S. Department of Energy’s National Nuclear Security Administration under contract DE-NA0003525. We wish to acknowledge our appreciation for the use of the Advanced Architecture Test Bed, Bowman, at Sandia National Laboratories. The test beds are provided by NNSA’s Advanced Simulation and Computing (ASC) program for research and development of advanced architectures for exascale computing.

Disclaimers: Intel, Xeon, and Xeon Phi are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.

* Other brands and names are the property of their respective owners.

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Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  • Stephen L. Olivier
    • 1
    Email author
  • Simon D. Hammond
    • 1
  • Alejandro Duran
    • 2
  1. 1.Center for Computing ResearchSandia National LaboratoriesAlbuquerqueUSA
  2. 2.Intel Corporation IberiaMadridSpain

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