Power-Performance Evaluation of Parallel Multi-objective EEG Feature Selection on CPU-GPU Platforms

  • Juan José Escobar
  • Julio OrtegaEmail author
  • Antonio Francisco Díaz
  • Jesús González
  • Miguel Damas
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10393)


Heterogeneous CPU-GPU platforms include resources to benefit from different kinds of parallelism present in many data mining applications based on evolutionary algorithms that evolve solutions with time-demanding fitness evaluation. This paper describes an evolutionary parallel multi-objective feature selection procedure with subpopulations using two scheduling alternatives for evaluation of individuals according to the number of subpopulations. Evolving subpopulations usually provides good diversity properties and avoids premature convergence in evolutionary algorithms. The proposed procedure has been implemented in OpenMP to distribute dynamically either subpopulations or individuals among devices and OpenCL to evaluate the individuals taking into account the devices characteristics, providing two parallelism levels in CPU and up to three levels in GPUs. Different configurations of the proposed procedure have been evaluated and compared with a master-worker approach considering not only the runtime and achieved speedups but also the energy consumption between both scheduling models.


Heterogeneous subpopulations scheduling Energy-aware computing EEG classification Multi-objective feature selection GPU 



Work funded by project TIN2015-67020-P (Spanish “Ministerio de Economía y Competitividad” and ERDF funds). We would also like to thank the BCI laboratory of the University of Essex, and especially prof. John Q. Gan, for allowing us to use their databases.


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Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  • Juan José Escobar
    • 1
  • Julio Ortega
    • 1
    Email author
  • Antonio Francisco Díaz
    • 1
  • Jesús González
    • 1
  • Miguel Damas
    • 1
  1. 1.Department of Computer Architecture and Technology, CITICUniversity of GranadaGranadaSpain

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