Abstract
Based on logistic chaotic system combined with m-sequence, a pseudo-random sequence generator is implemented on FPGA (Field-Programmable Gate Array) using DSP Builder design technology. The NIST (National Institute of Standard and Technology) standard called statistical test suite for random and pseudo-random number generators is used to test the pseudo-random sequence generated the generator. The results show that the sequence of the system has good random characteristics and can be applied to the actual stream key encryption system.
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Acknowledgment
Project supported by the National Natural Science Foundation of China (Grant Nos. 61471158), and Project supported by the Specialized Research Fund for the Doctoral Program of Higher Education of China (Grant No. 20132301110004).
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Feng, K., Ding, Q. (2018). Design and Implementation of Pseudo-Random Sequence Generator Based on Logistic Chaotic System and m-Sequence Using FPGA. In: Pan, JS., Tsai, PW., Watada, J., Jain, L. (eds) Advances in Intelligent Information Hiding and Multimedia Signal Processing. IIH-MSP 2017. Smart Innovation, Systems and Technologies, vol 82. Springer, Cham. https://doi.org/10.1007/978-3-319-63859-1_44
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DOI: https://doi.org/10.1007/978-3-319-63859-1_44
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