Abstract
The following paper propose a new memory management technique of handling the GState’s in DDK and the same can be extended for sending command buffer which hold the job request to various USM/UVC blocks in GPU. We shall discuss the most generic design followed across various device driver and explains the drawback of using the existing design and introduce the new memory management technique along with some futuristic improvements. This design philosophy is more suited in GPU architecture’s which have deferred multi-pass rendering for 3D graphics pipeline.
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© 2018 Springer International Publishing AG
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Voora, P., Anand, V., Patel, N. (2018). Memory Optimization Paradigm for High Performance Energy Efficient GPU. In: Satapathy, S., Joshi, A. (eds) Information and Communication Technology for Intelligent Systems (ICTIS 2017) - Volume 1. ICTIS 2017. Smart Innovation, Systems and Technologies, vol 83. Springer, Cham. https://doi.org/10.1007/978-3-319-63673-3_23
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DOI: https://doi.org/10.1007/978-3-319-63673-3_23
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Publisher Name: Springer, Cham
Print ISBN: 978-3-319-63672-6
Online ISBN: 978-3-319-63673-3
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