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Verified Compilation of Space-Efficient Reversible Circuits

  • Matthew AmyEmail author
  • Martin Roetteler
  • Krysta M. Svore
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10427)

Abstract

The generation of reversible circuits from high-level code is an important problem in several application domains, including low-power electronics and quantum computing. Existing tools compile and optimize reversible circuits for various metrics, such as the overall circuit size or the total amount of space required to implement a given function reversibly. However, little effort has been spent on verifying the correctness of the results, an issue of particular importance in quantum computing. There, compilation allows not only mapping to hardware, but also the estimation of resources required to implement a given quantum algorithm, a process that is crucial for identifying which algorithms will outperform their classical counterparts. We present a reversible circuit compiler called ReVerC, which has been formally verified in F\(^\star \) and compiles circuits that operate correctly with respect to the input program. Our compiler compiles the Revs language [21] to combinational reversible circuits with as few ancillary bits as possible, and provably cleans temporary values.

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Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  • Matthew Amy
    • 1
    • 2
    Email author
  • Martin Roetteler
    • 3
  • Krysta M. Svore
    • 3
  1. 1.Institute for Quantum ComputingWaterlooCanada
  2. 2.David R. Cheriton School of Computer ScienceUniversity of WaterlooWaterlooCanada
  3. 3.Microsoft ResearchRedmondUSA

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