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Abstract

This book has proposed gain-cell embedded DRAM (GC-eDRAM) as a promising alternative to SRAM for the implementation of embedded memories in low-power VLSI SoCs. The presented GC-eDRAM circuits were targeted at a broad range of low-power VLSI SoCs, from ultra-low power systems operated at subthreshold (sub-V T) voltages to power-aware high-performance systems operated at near-threshold (near-V T) or nominal supply voltages. It was shown that the key to achieve energy efficiency in GC-eDRAM is a proper understanding and control of the factors that determine the data retention time and its statistical distribution.

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Meinerzhagen, P., Teman, A., Giterman, R., Edri, N., Burg, A., Fish, A. (2018). Conclusions. In: Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip. Springer, Cham. https://doi.org/10.1007/978-3-319-60402-2_8

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  • DOI: https://doi.org/10.1007/978-3-319-60402-2_8

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-60401-5

  • Online ISBN: 978-3-319-60402-2

  • eBook Packages: EngineeringEngineering (R0)

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