Abstract
Low-power verification has become probably one of the most complex design verification problems to address under the design verification umbrella. Verification of low power is not simply restricted to checking for isolation cells, retention cells, and power domain ON/OFF conditions, but it also needs to check to see if the applied low-power techniques indeed improve the battery life without affecting performance!
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Report, S. T. (2008, September). Low power design, special technology report. SCDsource.
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Mehta, A.B. (2018). Low-Power Verification. In: ASIC/SoC Functional Design Verification. Springer, Cham. https://doi.org/10.1007/978-3-319-59418-7_9
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DOI: https://doi.org/10.1007/978-3-319-59418-7_9
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