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Resource and Energy Optimization Oriented Development of FPGA-Based Adaptive Logical Networks for Classification Problem

  • Alexander V. Palagin
  • Volodymyr M. Opanasenko
  • Sergey L. Kryvyi
Chapter
Part of the Studies in Systems, Decision and Control book series (SSDC, volume 105)

Abstract

New FPGA-based devices with a high degree of reconfigurability that allow dynamic to change architecture and structure are created. These devices improve the efficiency of reconfigurable devices and systems according to the optimal criteria of hardware resources and power consumption, which are decisive for the Green IT Engineering. This class of devices for the implementation of technology the “Reconfigurable computing” is viewed. It is showed that in the dynamic logical structure devices, the configuration dynamically changing depending on the specific solving problem by transmitting information about any given current configuration. As a basic structure for construction of such devices the adaptive logical networks (ALN) are considered. ALN designed for solving of a wide class of problems by means of directly implementing algorithms and by direct mapping of the input data into output data. Unlike already known methods for the synthesis of multilevel logic scheme, two new approaches to the synthesis of such schemes are proposed. The first approach is based on the description of Boolean network by polynomials. In this case coefficients of the polynomial are given by Hadamard matrix. The second approach is based on the description of Boolean network by means Zhegalkin polynomials. An algorithm for partition of the range of Boolean functions is developed. This algorithm (for input data of arbitrary length and a threshold value) allows determining the types of logical functions for each level of ALN. The algorithm is based on the analysis of bit-by-bit of the threshold value for a predetermined threshold relation. The correctness of implementation this algorithm is proved. An example of solving the XOR problem in neural networks by means of a two-layer network is adduced. This network uses proposed by the threshold device and implemented on FPGA chip.

Keywords

Adaptation ALN Boolean functions FPGA Green IT engineering Reconfiguration 

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Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  • Alexander V. Palagin
    • 1
  • Volodymyr M. Opanasenko
    • 1
  • Sergey L. Kryvyi
    • 2
  1. 1.Department of Microprocessor DevicesV.M. Glushkov Institute of Cybernetics of the NASUKievUkraine
  2. 2.Taras Shevchenko Kiev National UniversityKievUkraine

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