Manufacturing Solutions

Chapter

Abstract

The continued scaling of CMOS transistors has been the enabler of faster, cheaper, and denser ICs and electronics. However, as the scaling is slowly coming to its end, many challenges emerge, including higher static power, high manufacturing cost, and more important, reduced reliability. The latter is mainly due to process or time-zero variation (i.e., process variations) or time-dependent variations (either related to temporal/aging variations such as SILC, BTI, HCD, or to environmental variations such as radiations). This chapter provides a broad overview of the latest techniques that are being used to mitigate these reliability challenges in the latest technology nodes. In the first part of this chapter, we present some of the techniques that are being used to manage process variation, including both static and dynamic techniques. These techniques span the entire range from improved layout rules to dynamic voltage scaling all the way to techniques implemented in application software. In the second part of this chapter, a review of these aging effects is presented including SILC, BTI, HCD, and self-heating effects, as well as the latest research on how they can be mitigated. In the final section, we investigate radiation-induced upsets and how they impact the latest technology nodes including FinFET and SOI technologies.

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Copyright information

© Springer International Publishing AG 2018

Authors and Affiliations

  1. 1.IROC TechnologiesGrenobleFrance
  2. 2.Delft University of TechnologyDelftThe Netherlands
  3. 3.ImecLeuvenBelgium

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