A Configurable Shared Scratchpad Memory for GPU-like Processors

  • Alessandro Cilardo
  • Mirko GagliardiEmail author
  • Ciro Donnarumma
Conference paper
Part of the Lecture Notes on Data Engineering and Communications Technologies book series (LNDECT, volume 1)


During the last years Field Programmable Gate Arrays and Graphics Processing Units have become increasingly important for high-performance computing. In particular, a number of industrial solutions and academic projects are proposing design frameworks based on FPGA-implemented GPU-like compute units. Existing GPU-like core projects provide limited hardware support for shared scratchpad memory and particularly for the problem of bank conflicts, a major source of performance loss with many parallel kernels. In this paper, we present a configurable, GPU-like oriented scratchpad memory with built-in support for bank remapping. The core is fully synthetizable on FPGA with a contained hardware cost. We also validated the presented architecture with a cycle-accurate event-driven emulator written in C++ as well as an RTL simulator tool. Last, we demonstrated the impact of bank remapping and other parameters available with the proposed configurable shared scratchpad memory by evaluating the performance of two real-world parallelized kernels.


Memory Access Clock Cycle Field Programmable Gate Array Very Large Scale Integration Memory Bank 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer International Publishing AG 2017

Authors and Affiliations

  • Alessandro Cilardo
    • 1
  • Mirko Gagliardi
    • 1
    Email author
  • Ciro Donnarumma
    • 2
  1. 1.University of Naples Federico II and Centro Regionale ICT (CeRICT)NaplesItaly
  2. 2.University of Naples Federico IINaplesItaly

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