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Security and Trust Vulnerabilities in Third-Party IPs

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Abstract

Reusable hardware Intellectual Property (IP)-based System-on-Chip (SoC) design has emerged as a pervasive design practice in the industry to dramatically reduce design and verification cost while meeting aggressive time-to-market constraints. Growing reliance on these pre-verified hardware IPs, often gathered from untrusted third-party vendors, severely affects the security and trustworthiness of SoC computing platforms. An important emerging concern with the hardware IPs acquired from external sources is that they may come with deliberate malicious implants to incorporate undesired functionality, undocumented test and debug interface working as hidden backdoor, or other integrity issues. This chapter describes various security and trust vulnerabilities in third-party hardware IPs.

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Correspondence to Prabhat Mishra .

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Mishra, P., Tehranipoor, M., Bhunia, S. (2017). Security and Trust Vulnerabilities in Third-Party IPs. In: Mishra, P., Bhunia, S., Tehranipoor, M. (eds) Hardware IP Security and Trust. Springer, Cham. https://doi.org/10.1007/978-3-319-49025-0_1

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  • DOI: https://doi.org/10.1007/978-3-319-49025-0_1

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-49024-3

  • Online ISBN: 978-3-319-49025-0

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