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Parallelizing Simulated Annealing Algorithm in Many Integrated Core Architecture

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Computational Science and Its Applications – ICCSA 2016 (ICCSA 2016)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 9787))

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Abstract

The simulated annealing algorithm (SAA) is a well-established approach to the approximate solution of combinatorial optimisation problems. SAA allows for occasional uphill moves in an attempt to reduce the probability of becoming stuck in a poor but locally optimal solution. Previous work showed that SAA can find better solutions, but it takes much longer time. In this paper, in order to harness the power of the very recent hybrid Many Integrated Core Architecture (MIC), we propose a new parallel simulated annealing algorithm customised for MIC. Our experiments with the Travelling Salesman Problem (TSP) show that our parallel SAA gains significant speedup.

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References

  1. Bo, S., Yong, Z.G., Shao-hua, W., Xiao-wei, L., Qing, Z.: Research of offload parallel method based on MIC platform. Comput. Sci. 41(6), 477–480 (2014)

    Google Scholar 

  2. Choong, A., Beidas, R., Zhu, J.: Parallelizing simulated annealing-based placement using GPGPU. In: International Conference on Field Programmable Logic and Applications, FPL 2010, pp. 31–34. IEEE (2010)

    Google Scholar 

  3. Guo, S., Dou, Y., Lei, Y.: GPU parallel optimization of the oceanic general circulation model pop. Comput. Eng. Sci. 34(8), 147–153 (2012)

    Google Scholar 

  4. Hansen, P.B.: Studies in Computational Science: Parallel Programming Paradigms, 1st edn. Prentice Hall PTR, Upper Saddle River (1995)

    Google Scholar 

  5. Jie, F., Guohua, Z.: Parallel ant colony optimization algorithm with GPU-acceleration based on all-in-roulette selection. Comput. Digital Eng. 39(5), 23–26 (2011)

    Google Scholar 

  6. Johnson, D.S.: Local optimization and the traveling salesman problem. In: Paterson, M.S. (ed.) Automata, Languages and Programming. LNCS, vol. 443, pp. 446–461. Springer, Heidelberg (1990)

    Chapter  Google Scholar 

  7. Johnson, D.S., Aragon, C.R., McGeoch, L.A., Schevon, C.: Optimization by simulated annealing: an experimental evaluation; part i, graph partitioning. Oper. Res. 37(6), 865–892 (1989)

    Article  MATH  Google Scholar 

  8. Kirkpatrick, S., Gelatt Jr., C., Vecchi, M.: Optimization by simulated annealing. Science 220(4598), 671–680 (1983)

    Article  MathSciNet  MATH  Google Scholar 

  9. Ma, J., Li, K.p., Zhang, L.Y.: The adaptive parallel simulated annealing algorithm based on TBB. In: 2nd International Conference on Advanced Computer Control, ICACC 2010, vol. 4, pp. 611–615. IEEE (2010)

    Google Scholar 

  10. Radenski, A.: Distributed simulated annealing with MapReduce. In: Di Chio, C., et al. (eds.) EvoApplications 2012. LNCS, vol. 7248, pp. 466–476. Springer, Heidelberg (2012)

    Chapter  Google Scholar 

  11. Wang, H., Osen, O., Li, G., Li, W., Dai, H.N., Zeng, W.: Big data and industrial internet of things for the maritime industry in northwestern norway. In: IEEE Region 10 Conference, TENCON 2015 (2015)

    Google Scholar 

  12. Wei, W.: The research on parallel algorithm of simulation annealing. Comput. Knowl. Technol. 3(7), 1523–1524 (2008)

    Google Scholar 

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Acknowledgement

The work described in this paper was partially supported by Macao Science and Technology Development Fund under Grant No. 096/2013/A3 and the NSFC-Guangdong Joint Fund under Grant No. U1401251 and Guangdong Science and Technology Program under Grant No.2015B090923004.

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Correspondence to Hao Wang .

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Zhou, J., Xiao, H., Wang, H., Dai, HN. (2016). Parallelizing Simulated Annealing Algorithm in Many Integrated Core Architecture. In: Gervasi, O., et al. Computational Science and Its Applications – ICCSA 2016. ICCSA 2016. Lecture Notes in Computer Science(), vol 9787. Springer, Cham. https://doi.org/10.1007/978-3-319-42108-7_18

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  • DOI: https://doi.org/10.1007/978-3-319-42108-7_18

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-42107-0

  • Online ISBN: 978-3-319-42108-7

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