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Hardware/Software Co-design for a Gender Recognition Embedded System

Part of the Lecture Notes in Computer Science book series (LNAI,volume 9799)

Abstract

Gender recognition has applications in human-computer interaction, biometric authentication, and targeted marketing. This paper presents an implementation of an algorithm for binary male/female gender recognition from face images based on a shunting inhibitory convolutional neural network, which has a reported accuracy on the FERET database of 97.2 %. The proposed hardware/software co-design approach using an ARM processor and FPGA can be used as an embedded system for a targeted marketing application to allow real-time processing. A threefold speedup is achieved in the presented approach compared to a software implementation on the ARM processor alone.

Keywords

  • Real-time
  • Embedded system
  • Computer vision
  • FPGA
  • Neural network
  • Co-design
  • Hardware acceleration

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Correspondence to Andrew Tzer-Yeu Chen .

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Chen, A.TY., Biglari-Abhari, M., Wang, K.IK., Bouzerdoum, A., Tivive, F.H.C. (2016). Hardware/Software Co-design for a Gender Recognition Embedded System. In: Fujita, H., Ali, M., Selamat, A., Sasaki, J., Kurematsu, M. (eds) Trends in Applied Knowledge-Based Systems and Data Science. IEA/AIE 2016. Lecture Notes in Computer Science(), vol 9799. Springer, Cham. https://doi.org/10.1007/978-3-319-42007-3_47

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  • DOI: https://doi.org/10.1007/978-3-319-42007-3_47

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-42006-6

  • Online ISBN: 978-3-319-42007-3

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