Abstract
In most of the ADC architectures, the linearity of the transfer curve is dependent upon the linearity of the circuit elements used in their construction, e.g. resistors and capacitors. In this chapter, we present a CS-ADC that overcomes this limitation while employing very nonlinear MOSCAPs as the capacitance elements of the DAC. Additionally, we benefit from the nonlinearity of the MOSCAPs to improve the ADC tolerance to comparator offset and noise. Furthermore, local voltage boosting is used to improve the resistance of the DAC switches, and a new boost-and-bootstrap switch is proposed and used in the TH, allowing over-rails operation regarding the input signal. The ideas are validated with the implementation of a 9-bit prototype ADC in a 0.13 μm CMOS process, that operates with 0.6 V of supply voltage and handles differential input signals with 1.7 VP−P . Despite the strong dependency of the MOSCAPs to temperature, the prototype performs with an ENOB larger than 8.5 for a temperature range of −40 to 85 ∘C. While converting a full-range signal near Nyquist frequency at 1 MSps of sampling frequency, the prototype consumes 2.78 μW, leading to a FOM of 7.8 fJ/conversion-step.
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Notes
- 1.
The MIM capacitors are generally fabricated on top of the routing metal layers and use a thin layer of insulator, which requires additional fabrication steps and increases the fabrication costs. The density of the MIM capacitor is a direct function of the dielectric constant (κ) of the insulating material. However, for most of the high-κ oxides, it is observed that the capacitance increases with the voltage [2, 3], bringing a clear trade-off between linearity and density that limits the performance of MIM capacitors.
- 2.
The MOM capacitors come for free in digital CMOS processes and are made with stacked wires of routing metals that perform as plates, separated by the BEOL oxide. This type of capacitor clearly benefits from the advances in lithography, that permit metal wires to be drawn closer together. However, in order to minimize the routing parasitics in modern processes, CMOS scaling demands the use of low-κ BEOL dielectrics, which ultimately hinders the capacitance density of MOM capacitors.
- 3.
The MOSCAP is implemented using a MOS transistor with drain and source shorted, and presents the highest capacitance density among the integrated capacitors. It does not require additional fabrication steps. However, due to its highly nonlinear C(V ) characteristic, its use is commonly reserved for applications in which the accuracy of capacitance is not critical, including decoupling and frequency compensation.
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Appendix: Frequency-Dependency of C(V ) in MOSCAPs
Appendix: Frequency-Dependency of C(V ) in MOSCAPs
One important aspect of MOSCAPs is that its C(V ) characteristics are frequency-dependent [4]. To have a better understanding on this phenomenon, we should analyze the circuit used to extract the C(V ) curves of a MOSCAP, shown in Fig. 7.20. The voltage source v ac injects an ac signal with small amplitude, and VCM and VDIF are dc. The capacitance at a determined bias is found with (7.4), where f and v ac are the frequency and magnitude of the injected ac signal.
Circuit used to simulate the C(V ) curve of MOSCAPs
To extract the C(V ) curve, VDIF is swept and the values of capacitance found with (7.4) are plotted versus VDIF . However, the curve presents different shapes consonant to the choice of frequency of v ac, if NQS effects are taken into account [4]. Specifically, for sufficiently high frequencies, the inversion layer is not able to build up fast enough, and the capacitance is drastically reduced in that region. The simulated curve for several values of v ac frequency, ranging from 1 Hz to 500 MHz, is shown in Fig. 7.21. As a remark, although most of the transistor models include NQS effects, they may be disabled by default in a simulation. In the case of the BSIM3v3 model, the model of NQS effects is applicable for both large signal transient and small signal ac analysis. Even though good accuracy is expected from these models [9], especially when an enhanced modeling methodology such as [10] is employed, in this work the simulated value was used only as a coarse estimate to guide the MOSCAP-DAC sizing.
Simulated C(V ) for several values of frequency of the v ac source, ranging from 1 Hz to 500 MHz, simulated with the circuit of Fig. 7.20, with VCM = 0. 3 V. The size of the MOSCAP is W = 0. 16 μm and L = 6. 5 μm
The results in Fig. 7.21 suggest that the NQS effects may affect the pre-charge time of the MOSCAP-DAC. In spite of the fact that the MOSCAPs are pre-charged to a reference voltage VPC that is dc, the settling time allocated for this process is finite. To evaluate the impact of the NQS effects to the pre-charge cycle of the MOSCAP-DAC, the settling time of a single unit-capacitor when subject to a voltage step is evaluated using the circuit of Fig. 7.22, and shown in Fig. 7.23. The gate charge is found integrating ICAP . When the NQS effects are not taken into account, the RC constant of the circuit is in the range of hundreds of picoseconds, dictated by the 10 k\(\Omega\) resistor and the MOSCAP capacitance. On the other hand, when NQS effects are included in the simulation, the RC constant is increased to several nanoseconds. According to this analysis, a few tens of nanoseconds should be allocated to pre-charge and discharge the MOSCAPs. For this specific design, this is not an issue, but may be a limiting factor in implementations with faster sampling speeds. A possible counter-measure is to use shorter transistors while trading-off β C for a faster response due to limited NQS effects.
Circuit used to simulate the impact of NQS behavior in the pre-charge of MOSCAPs. The size of the MOSCAP is W = 0. 16 μm and L = 6. 5 μm
Simulated pre-charge of a MOSCAP, using quasi-static (QS) and NQS models
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Rabuske, T., Fernandes, J. (2017). A 9-Bit 0.6-V CS-ADC with a MOSCAP-DAC. In: Charge-Sharing SAR ADCs for Low-Voltage Low-Power Applications . Analog Circuits and Signal Processing. Springer, Cham. https://doi.org/10.1007/978-3-319-39624-8_7
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DOI: https://doi.org/10.1007/978-3-319-39624-8_7
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