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A 9-Bit 0.6-V CS-ADC with a MOSCAP-DAC

  • Taimur Rabuske
  • Jorge Fernandes
Chapter
  • 1.2k Downloads
Part of the Analog Circuits and Signal Processing book series (ACSP)

Abstract

In most of the ADC architectures, the linearity of the transfer curve is dependent upon the linearity of the circuit elements used in their construction, e.g. resistors and capacitors. In this chapter, we present a CS-ADC that overcomes this limitation while employing very nonlinear MOSCAPs as the capacitance elements of the DAC. Additionally, we benefit from the nonlinearity of the MOSCAPs to improve the ADC tolerance to comparator offset and noise. Furthermore, local voltage boosting is used to improve the resistance of the DAC switches, and a new boost-and-bootstrap switch is proposed and used in the TH, allowing over-rails operation regarding the input signal. The ideas are validated with the implementation of a 9-bit prototype ADC in a 0.13 μm CMOS process, that operates with 0.6 V of supply voltage and handles differential input signals with 1.7 VP−P . Despite the strong dependency of the MOSCAPs to temperature, the prototype performs with an ENOB larger than 8.5 for a temperature range of −40 to 85 C. While converting a full-range signal near Nyquist frequency at 1 MSps of sampling frequency, the prototype consumes 2.78 μW, leading to a FOM of 7.8 fJ/conversion-step.

Keywords

Parasitic Capacitance Nyquist Frequency Capacitance Density Binary Search Algorithm Local Voltage 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer International Publishing Switzerland 2017

Authors and Affiliations

  • Taimur Rabuske
    • 1
  • Jorge Fernandes
    • 1
  1. 1.INESC-ID Instituto Superior TécnicoUniversidade de LisboaLisboaPortugal

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