Characterizing Defects Responsible for Charge Transport Characteristics at Interfaces of Nano-Thick Materials Stacks
Major functioning blocks in modern devices employed in a variety of applications (electronics, energy harvesting, sensors, etc.) comprise of stacks of nm-thin layers of dielectric materials in contact with conductive electrodes (semiconductors, metals). The performance and reliability of these devices are affected by charge transfer characteristics of these multilayer stacks. We discuss collaboration between electrical measurements and computational modeling leading to identification of defects responsible for degradation phenomena in nm-thin dielectric films employed as gate dielectrics in metal oxide field effect transistors.
KeywordsOxygen Vacancy Gate Dielectric Dielectric Film Gate Electrode Metal Oxide Film
MBW and ALS were supported by EU FP7 project MORDRED (EU Project grant No. 261868) and COST Action CM1104. Via our membership of the UK’s HPC Materials Chemistry Consortium, which is funded by EPSRC (EP/L000202), this work made use of the UK’s national high-performance computing service HECToR and ARCHER, which is funded by the Offce of Science and Technology through the EPSRC’s High End Computing Programme. We also acknowledge the use of computer time granted to the “InterDef” project under the DECI-10 PRACE call from the European Union. The work at The Aerospace Corporation was supported by the LTCP program. We are grateful to D. Veksler and L. Larcher for valuable discussions and contributions to data analysis, and to S. Ling for optimizing basis sets for Hafnium.
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