Background and Related Work

  • Semeen Rehman
  • Muhammad Shafique
  • Jörg Henkel


This chapter presents the background knowledge regarding different sources of the emerging reliability threats (i.e., soft errors, process variation, and aging-induced effects), the related work on soft error modeling, and their mitigation techniques. In particular, Sect. 2.1 provides the background regarding soft errors, starting with the basic transistor structure and its functionality, followed by various soft error sources and the soft error mechanism. Section 2.2 presents the basics of the NBTI-induced aging phenomena. Section 2.3 presents different variability sources and manufacturing induced process variation effects along with the process variation model explained in Sect. 2.3.1. Section 2.4 discusses the related work on soft error modeling and estimation at both the hardware and software layers. Starting from the traditional to more advanced approaches, Sect. 2.5 presents state-of-the-art soft error mitigation techniques at both hardware and software levels. As the focus of this work is on soft errors, most of the background discussed is related to soft errors. Towards the end, Sect. 2.6 summarizes the related work.


Register File Fault Injection Soft Error Critical Charge Threshold Voltage Shift 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer International Publishing Switzerland 2016

Authors and Affiliations

  • Semeen Rehman
    • 1
  • Muhammad Shafique
    • 2
  • Jörg Henkel
    • 2
  1. 1.CES – Chair for Embedded SystemsKarlsruhe Institute of TechnologyKarlsruheGermany
  2. 2.Department of Computer ScienceKarlsruhe Institute of TechnologyKarlsruheGermany

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