Computation of Cores in Big Datasets: An FPGA Approach

  • Maciej Kopczynski
  • Tomasz Grzes
  • Jaroslaw Stepaniuk
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9436)


In this paper we propose the FPGA and softcore CPU supported device for performing core calculation for large datasets using rough set methods. Presented architecture has been tested on two real datasets by downloading and running presented solution inside FPGA. Sizes of the datasets were in range 1 000 to 10 000 000 objects. Results show the big acceleration in terms of the computation time using hardware supporting core generation unit.


Rough sets FPGA Hardware Core 



The research is supported by the Polish National Science Centre under the grant 2012/07/B/ST6/01504 (Jaroslaw Stepaniuk, Maciej Kopczynski) and by the scientific grant S/WI/3/2013 (Tomasz Grzes).


  1. 1.
    Bezerra, E., Lettnin, D.V.: Synthesizable VHDL Design for FPGAs. Springer, New York (2014)CrossRefGoogle Scholar
  2. 2.
    Grześ, T., Kopczyński, M., Stepaniuk, J.: FPGA in rough set based core and reduct computation. In: Lingras, P., Wolski, M., Cornelis, C., Mitra, S., Wasilewski, P. (eds.) RSKT 2013. LNCS, vol. 8171, pp. 263–270. Springer, Heidelberg (2013) CrossRefGoogle Scholar
  3. 3.
    Kanasugi, A., Yokoyama, A.: A basic design for rough set processor. In: The 15th Annual Conference of Japanese Society for Artificial Intelligence (2001)Google Scholar
  4. 4.
    Kopczyński, M., Stepaniuk, J.: Hardware implementations of rough set methods in programmable logic devices. In: Skowron, A., Suraj, Z. (eds.) Rough Sets and Intelligent Systems - Professor Zdzisław Pawlak in Memoriam. ISRL, vol. 43, pp. 309–321. Springer, Heidelberg (2013)CrossRefGoogle Scholar
  5. 5.
    Kopczyński, M., Grześ, T., Stepaniuk, J.: FPGA in rough-granular computing : reduct generation. In: WI 2014 : The 2014 IEEE/WCI/ACM International Joint Conferences on Web Intelligence, vol. 2, pp. 364–370. IEEE Computer Society, Warsaw (2014)Google Scholar
  6. 6.
    Kopczynski, M., Grzes, T., Stepaniuk, J.: Generating core in rough set theory: design and implementation on FPGA. In: Kryszkiewicz, M., Cornelis, C., Ciucci, D., Medina-Moreno, J., Motoda, H., Raś, Z.W. (eds.) RSEISP 2014. LNCS, vol. 8537, pp. 209–216. Springer, Heidelberg (2014) Google Scholar
  7. 7.
    Lewis, T., Perkowski, M., Jozwiak, L.: Learning in hardware: architecture and implementation of an FPGA-based rough set machine. In: 25th Euromicro Conference (EUROMICRO 1999), vol. 1, p. 1326 (1999)Google Scholar
  8. 8.
    Lichman, M.: UCI Machine Learning Repository, Irvine, CA: University of California, School of Information and Computer Science (2013).
  9. 9.
    Muraszkiewicz, M., Rybiński, H.: Towards a parallel rough sets computer. In: Rough Sets, Fuzzy Sets and Knowledge Discovery: Proceedings of the International Workshop on Rough Sets and Knowledge Discovery, RSKD pp. 434–443 (1994)Google Scholar
  10. 10.
    Nguyen, H.S.: Approximate boolean reasoning: foundations and applications in data mining. In: Peters, J.F., Skowron, A. (eds.) Transactions on Rough Sets V. LNCS, vol. 4100, pp. 334–506. Springer, Heidelberg (2006) CrossRefGoogle Scholar
  11. 11.
    Pawlak, Z.: Elementary rough set granules: Toward a rough set processor. In: Rough-Neurocomputing: Techniques for Computing with Words. Cognitive Technologies, pp. 5–14. Springer, Berlin (2004)Google Scholar
  12. 12.
    Pawlak, Z., Skowron, A.: Rudiments of rough sets. Inf. Sci. 177(1), 3–27 (2007)zbMATHMathSciNetCrossRefGoogle Scholar
  13. 13.
    Stepaniuk, J.: Knowledge discovery by application of rough set models. In: Polkowski, L., Tsumoto, S., Lin, T.Y. (eds.) Rough Set Methods and Applications: New Developments in Knowledge Discovery in Information Systems, pp. 137–233. Physica-Verlag, Heidelberg (2000)CrossRefGoogle Scholar
  14. 14.
    Stepaniuk, J.: Rough-Granular Computing in Knowledge Discovery and Data Mining. Springer, New York (2008)zbMATHGoogle Scholar
  15. 15.
    Stepaniuk, J., Kopczyński, M., Grześ, T.: The first step toward processor for rough set methods. Fundamenta Informaticae 127, 429–443 (2013)Google Scholar
  16. 16.
    Tiwari, K.S., Kothari, A.G.: Design and implementation of rough set algorithms on FPGA: a survey. (IJARAI) Int. J. Adv. Res. Artif. Intell. 3(9), 14–23 (2014)Google Scholar

Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  • Maciej Kopczynski
    • 1
  • Tomasz Grzes
    • 1
  • Jaroslaw Stepaniuk
    • 1
  1. 1.Faculty of Computer ScienceBialystok University of TechnologyBialystokPoland

Personalised recommendations