An Experiment to Introduce Interrupts in SDL

  • Emmanuel GaudinEmail author
  • Alain Clouard
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 9369)


Specific modelling technologies for digital hardware design are typically the synthesizable, cycle-accurate register-transfer level descriptions (VHDL or Verilog RTL) or bit-accurate transaction level models (SystemC TLM). Given nowadays complexity of circuits such as System-on-a-Chip (SoC) for multimedia embedded systems, and of the embedded software interacting with the SoC, there is a need for a higher abstraction level that would ease mastering the interaction, starting from initial conceptual stages of a product development. The Specification and Description Language (SDL) modelling technology allows to describe functional models independently from their implementation. This paper describes a work done by STMicroelectronics and PragmaDev to experiment the use of SDL high level functional description in a typical simple hardware/ software interaction scenario involving interrupts handling.


Interrupts Modelling Hardware Functional 


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Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  1. 1.PragmaDevParisFrance
  2. 2.STMicroelectronicsGrenobleFrance

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