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Improved Algorithms for Debugging Problems on Erroneous Reversible Circuits

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Book cover Reversible Computation (RC 2015)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 9138))

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Abstract

Reversible circuits and their synthesis methods have been actively studied in order to realize reversible computation. However, there are few known ways to debug erroneous reversible circuits. In this paper, we propose new algorithms for debugging problems. For single gate error, we improve the theoretical efficiency of previous methods, which use worst case exponential time algorithms such as SAT or decision diagrams. We also propose an algorithm debugging multiple gate error circuits by using \(\pi \)DDs, decision diagrams for permutation sets. We evaluate our algorithms theoretically and experimentally, and confirm significant improvement.

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Author information

Authors and Affiliations

  1. Graduate School of Information Science and Technology, Hokkaido University, Sapporo-shi, Japan

    Yuma Inoue & Shin-ichi Minato

  2. JST ERATO MINATO Discrete Structure Manipulation System Project, Sapporo-shi, Japan

    Shin-ichi Minato

Authors
  1. Yuma Inoue
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  2. Shin-ichi Minato
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Corresponding author

Correspondence to Yuma Inoue .

Editor information

Editors and Affiliations

  1. CNRS and Université Paris Diderot, Paris, France

    Jean Krivine

  2. Inria, St. Ismier Cedex, France

    Jean-Bernard Stefani

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Inoue, Y., Minato, Si. (2015). Improved Algorithms for Debugging Problems on Erroneous Reversible Circuits. In: Krivine, J., Stefani, JB. (eds) Reversible Computation. RC 2015. Lecture Notes in Computer Science(), vol 9138. Springer, Cham. https://doi.org/10.1007/978-3-319-20860-2_12

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  • DOI: https://doi.org/10.1007/978-3-319-20860-2_12

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-20859-6

  • Online ISBN: 978-3-319-20860-2

  • eBook Packages: Computer ScienceComputer Science (R0)

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