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Three-Dimensional Design Methodologies for Tree-based FPGA Architecture pp 13–41Cite as

Three-Dimensional Integration: A More Than Moore Technology

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Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 350))

Abstract

Three-dimensional integrated circuits (3D-ICs), which contain multiple layers of active devices, have the potential to dramatically enhance chip performance, functionality, and device packing density. They also provide for microchip architecture and may facilitate the integration of heterogeneous materials, devices, and signals and offer a promising solution for reducing both silicon footprint and interconnect length without shrinking the transistors. However, before these advantages can be realized, key technology and CAD challenges of 3D-ICs must be addressed. More specifically, the process required to build circuits with multiple layers of active devices and CAD tools used for design and validation of such circuits. Several such methodologies and CAD tools associated with the design fabrication of 3-D ICs are discussed in this chapter. Few successful 3D-IC design methods and CAD tools and benefits of applying 3D design to the future reconfigurable systems are also discussed in this chapter.

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Authors and Affiliations

  1. Electrical and Computer Engineering Department, School of Engineering, American University in Dubai, Dubai, United Arab Emirates

    Vinod Pangracious

  2. Flexras Technologies, Biocitech, Romainville, France

    Zied Marrakchi

  3. University of Pierre and Marie Curie, Paris VI, Paris, France

    Habib Mehrez

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  1. Vinod Pangracious
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  2. Zied Marrakchi
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Correspondence to Vinod Pangracious .

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Pangracious, V., Marrakchi, Z., Mehrez, H. (2015). Three-Dimensional Integration: A More Than Moore Technology. In: Three-Dimensional Design Methodologies for Tree-based FPGA Architecture. Lecture Notes in Electrical Engineering, vol 350. Springer, Cham. https://doi.org/10.1007/978-3-319-19174-4_2

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