Advertisement

Using Flow Specifications of Parameterized Cache Coherence Protocols for Verifying Deadlock Freedom

  • Divjyot Sethi
  • Muralidhar Talupur
  • Sharad Malik
Part of the Lecture Notes in Computer Science book series (LNCS, volume 8837)

Abstract

We consider the problem of verifying deadlock freedom for symmetric cache coherence protocols. While there are multiple definitions of deadlock in the literature, we focus on a specific form of deadlock which is useful for the cache coherence protocol domain and is consistent with the internal definition of deadlock in theMurphi model checker: we refer to this deadlock as a system-wide deadlock (s-deadlock). In s-deadlock, the entire system gets blocked and is unable to make any transition. Cache coherence protocols consist of N symmetric cache agents, where N is an unbounded parameter; thus the verification of s-deadlock freedom is naturally a parameterized verification problem.

Parametrized verification techniques work by using sound abstractions to reduce the unbounded model to a bounded model. Efficient abstractions which work well for industrial scale protocols typically bound the model by replacing the state of most of the agents by an abstract environment, while keeping just one or two agents as is. However, leveraging such efficient abstractions becomes a challenge for s-deadlock: a violation of s-deadlock is a state in which the transitions of all of the unbounded number of agents cannot occur and so a simple abstraction like the one above will not preserve this violation. Authors of a prior paper, in fact, proposed using a combination of over and under abstractions for verifying such properties. While quite promising for a large class of deadlock errors, simultaneously tuning over and under abstractions can become complex.

In this work we address this challenge by presenting a technique which leverages high-level information about the protocols, in the form of message sequence diagrams referred to as flows, for constructing invariants that are collectively stronger than s-deadlock. Further, violations of these invariants can involve only one or two interacting agents: thus they can be verified using efficient abstractions like the ones described above.We show how such invariants for the German and Flash protocols can be successfully derived using our technique and then be verified.

Keywords

Model Check Mutual Exclusion Cache Line Liveness Property Unbounded Number 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Abadi, M., Lamport, L.: Composing specifications. ACM Trans. Program. Lang. Syst. 15(1), 73–132 (1993), http://doi.acm.org/10.1145/151646.151649 CrossRefGoogle Scholar
  2. 2.
    Abadi, M., Lamport, L.: Conjoining specifications. ACM Trans. Program. Lang. Syst. 17(3), 507–535 (1995), http://doi.acm.org/10.1145/203095.201069 CrossRefGoogle Scholar
  3. 3.
    Abdulla, P., Haziza, F., Holk, L.: A model-constructing satisfiability calculus. In: Giacobazzi, R., Berdine, J., Mastroeni, I. (eds.) VMCAI 2013. LNCS, vol. 7737, pp. 1–12. Springer, Heidelberg (2013), http://dx.doi.org/10.1007/978-3-642-35873-9_28 CrossRefGoogle Scholar
  4. 4.
    Abdulla, P.A., Jonsson, B., Nilsson, M., Saksena, M.: A survey of regular model checking. In: Gardner, P., Yoshida, N. (eds.) CONCUR 2004. LNCS, vol. 3170, pp. 35–48. Springer, Heidelberg (2004), http://dx.doi.org/10.1007/978-3-540-28644-8_3 CrossRefGoogle Scholar
  5. 5.
    Arons, T., Pnueli, A., Ruah, S., Xu, J., Zuck, L.D.: Parameterized verification with automatically computed inductive assertions. In: Berry, G., Comon, H., Finkel, A. (eds.) CAV 2001. LNCS, vol. 2102, pp. 221–234. Springer, Heidelberg (2001), http://dl.acm.org/citation.cfm?id=647770.734120 CrossRefGoogle Scholar
  6. 6.
    Baukus, K., Lakhnech, Y., Stahl, K.: Parameterized verification of a cache coherence protocol: Safety and liveness. In: Cortesi, A. (ed.) VMCAI 2002. LNCS, vol. 2294, pp. 317–330. Springer, Heidelberg (2002), http://dl.acm.org/citation.cfm?id=646541.696180 CrossRefGoogle Scholar
  7. 7.
    Bingham, B., Bingham, J., Erickson, J., Greenstreet, M.: Distributed explicit state model checking of deadlock freedom. In: Sharygina, N., Veith, H. (eds.) CAV 2013. LNCS, vol. 8044, pp. 235–241. Springer, Heidelberg (2013)CrossRefGoogle Scholar
  8. 8.
    Bingham, B., Greenstreet, M., Bingham, J.: Parameterized verification of deadlock freedom in symmetric cache coherence protocols. In: Proceedings of the International Conference on Formal Methods in Computer-Aided Design, FMCAD 2011, pp. 186–195. FMCAD Inc, Austin (2011), http://dl.acm.org/citation.cfm?id=2157654.2157683 Google Scholar
  9. 9.
    Boigelot, B., Legay, A., Wolper, P.: Iterating transducers in the large. In: Hunt Jr., W.A., Somenzi, F. (eds.) CAV 2003. LNCS, vol. 2725, pp. 223–235. Springer, Heidelberg (2003), http://dx.doi.org/10.1007/978-3-540-45069-6_24 CrossRefGoogle Scholar
  10. 10.
    Bouajjani, A., Jonsson, B., Nilsson, M., Touili, T.: Regular model checking. In: Emerson, E.A., Sistla, A.P. (eds.) CAV 2000. LNCS, vol. 1855, pp. 403–418. Springer, Heidelberg (2000), http://dl.acm.org/citation.cfm?id=647769.734106 CrossRefGoogle Scholar
  11. 11.
    Chou, C.-T., Mannava, P.K., Park, S.: A simple method for parameterized verification of cache coherence protocols. In: Hu, A.J., Martin, A.K. (eds.) FMCAD 2004. LNCS, vol. 3312, pp. 382–398. Springer, Heidelberg (2004)CrossRefGoogle Scholar
  12. 12.
    Clarke, E.M., Grumberg, O., Browne, M.C.: Reasoning about networks with many identical finite-state processes. In: Proceedings of the Fifth Annual ACM Symposium on Principles of Distributed Computing, PODC 1986, pp. 240–248. ACM, New York (1986), http://doi.acm.org/10.1145/10590.10611 CrossRefGoogle Scholar
  13. 13.
    Clarke, E., Talupur, M., Veith, H.: Proving ptolemy right: the environment abstraction framework for model checking concurrent systems. In: Ramakrishnan, C.R., Rehof, J. (eds.) TACAS 2008. LNCS, vol. 4963, pp. 33–47. Springer, Heidelberg (2008), http://portal.acm.org/citation.cfm?id=1792734.1792740 CrossRefGoogle Scholar
  14. 14.
    Clarke, E., Talupur, M., Veith, H.: Environment abstraction for parameterized verification. In: Emerson, E.A., Namjoshi, K.S. (eds.) VMCAI 2006. LNCS, vol. 3855, pp. 126–141. Springer, Heidelberg (2006), http://dx.doi.org/10.1007/11609773_9 CrossRefGoogle Scholar
  15. 15.
    Conchon, S., Goel, A., Krstic, S., Mebsout, A., Zaidi, F.: Invariants for finite instances and beyond. In: Formal Methods in Computer-Aided Design (FMCAD), pp. 61–68 (October 2013)Google Scholar
  16. 16.
    Dams, D., Gerth, R., Grumberg, O.: Abstract interpretation of reactive systems. ACM Trans. Program. Lang. Syst. 19(2), 253–291 (1997), http://doi.acm.org/10.1145/244795.244800 CrossRefGoogle Scholar
  17. 17.
    Das, S., Dill, D., Park, S.: Experience with predicate abstraction. In: Halbwachs, N., Peled, D.A. (eds.) CAV 1999. LNCS, vol. 1633, pp. 160–171. Springer, Heidelberg (1999), http://dx.doi.org/10.1007/3-540-48683-6_16 CrossRefGoogle Scholar
  18. 18.
    Emerson, E.A., Kahlon, V.: Reducing model checking of the many to the few. In: McAllester, D. (ed.) CADE 2000. LNCS, vol. 1831, pp. 236–254. Springer, Heidelberg (2000), http://dl.acm.org/citation.cfm?id=648236.753642
  19. 19.
    Emerson, E.A., Kahlon, V.: Exact and efficient verification of parameterized cache coherence protocols. In: Geist, D., Tronci, E. (eds.) CHARME 2003. LNCS, vol. 2860, pp. 247–262. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  20. 20.
    Emerson, E.A., Namjoshi, K.S.: Automatic verification of parameterized synchronous systems (extended abstract). In: Alur, R., Henzinger, T.A. (eds.) CAV 1996. LNCS, vol. 1102, pp. 87–98. Springer, Heidelberg (1996), http://dl.acm.org/citation.cfm?id=647765.735841 CrossRefGoogle Scholar
  21. 21.
    Fang, Y., Piterman, N., Pnueli, A., Zuck, L.: Liveness with invisible ranking. Int. J. Softw. Tools Technol. Transf. 8(3), 261–279 (2006), http://dx.doi.org/10.1007/s10009-005-0193-x CrossRefGoogle Scholar
  22. 22.
    Holt, R.C.: Some deadlock properties of computer systems. ACM Comput. Surv. 4(3), 179–196 (1972), http://doi.acm.org/10.1145/356603.356607 MathSciNetCrossRefGoogle Scholar
  23. 23.
    Ip, C.N., Dill, D.L.: Better verification through symmetry. In: Proc. Conf. on Computer Hardware Description Languages and their Applications, pp. 97–111 (1993)Google Scholar
  24. 24.
    Kaiser, A., Kroening, D., Wahl, T.: Dynamic cutoff detection in parameterized concurrent programs. In: Touili, T., Cook, B., Jackson, P. (eds.) CAV 2010. LNCS, vol. 6174, pp. 645–659. Springer, Heidelberg (2010), http://dx.doi.org/10.1007/978-3-642-14295-6_55 CrossRefGoogle Scholar
  25. 25.
    Kristic, S.: Parameterized system verification with guard strengthening and parameter abstraction. In: 4th Int. Workshop on Automatic Verification of Finite State Systems (2005)Google Scholar
  26. 26.
    Kuskin, J., Ofelt, D., Heinrich, M., Heinlein, J., Simoni, R., Gharachorloo, K., Chapin, J., Nakahira, D., Baxter, J., Horowitz, M., Gupta, A., Rosenblum, M., Hennessy, J.: The stanford flash multiprocessor. In: Proceedings the 21st Annual International Symposium on Computer Architecture, pp. 302–313 (1994)Google Scholar
  27. 27.
    Lahiri, S.K., Bryant, R.E.: Predicate abstraction with indexed predicates. ACM Trans. Comput. Logic 9(1) (2007), http://doi.acm.org/10.1145/1297658.1297662
  28. 28.
    Mcmillan, K.L.: Parameterized verification of the flash cache coherence protocol by compositional model checking. In: Margaria, T., Melham, T.F. (eds.) CHARME 2001. LNCS, vol. 2144, pp. 179–195. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  29. 29.
    McMillan, K.L.: Circular compositional reasoning about liveness. In: Pierre, L., Kropf, T. (eds.) CHARME 1999. LNCS, vol. 1703, pp. 342–346. Springer, Heidelberg (1999), http://dl.acm.org/citation.cfm?id=646704.701881 CrossRefGoogle Scholar
  30. 30.
    McMillan, K.L.: Verification of infinite state systems by compositional model checking. In: Pierre, L., Kropf, T. (eds.) CHARME 1999. LNCS, vol. 1703, pp. 219–237. Springer, Heidelberg (1999), http://dl.acm.org/citation.cfm?id=646704.702020 CrossRefGoogle Scholar
  31. 31.
  32. 32.
    O’Leary, J., Talupur, M., Tuttle, M.R.: Protocol verification using flows: An industrial experience. In: Formal Methods in Computer-Aided Design, FMCAD 2009, pp. 172–179 (November 2009)Google Scholar
  33. 33.
    Park, S., Dill, D.L.: Verification of flash cache coherence protocol by aggregation of distributed transactions. In: SPAA ’96: Proceedings of the eighth annual ACM symposium on Parallel algorithms and architectures, pp. 288–296. ACM Press (1996)Google Scholar
  34. 34.
    Pnueli, A., Ruah, S., Zuck, L.D.: Automatic deductive verification with invisible invariants. In: Margaria, T., Yi, W. (eds.) TACAS 2001. LNCS, vol. 2031, pp. 82–97. Springer, Heidelberg (2001), http://dl.acm.org/citation.cfm?id=646485.694452 CrossRefGoogle Scholar
  35. 35.
    Pnueli, A., Xu, J., Zuck, L.D.: Liveness with (0,1, ∞ )-counter abstraction. In: Brinksma, E., Larsen, K.G. (eds.) CAV 2002. LNCS, vol. 2404, pp. 107–122. Springer, Heidelberg (2002), http://dl.acm.org/citation.cfm?id=647771.734286 CrossRefGoogle Scholar
  36. 36.
    Resten, Y., Maler, O., Marcus, M., Pnueli, A., Shahar, E.: Symbolic model checking with rich assertional languages. In: Grumberg, O. (ed.) CAV 1997. LNCS, vol. 1254, pp. 424–435. Springer, Heidelberg (1997), http://dx.doi.org/10.1007/3-540-63166-6_41 CrossRefGoogle Scholar
  37. 37.
    Sethi, D., Talupur, M., Malik, S.: Using flow specifications of parameterized cache coherence protocols for verifying deadlock freedom. ArXiv:1407.7468Google Scholar
  38. 38.
    Talupur, M., Tuttle, M.R.: Going with the flow: Parameterized verification using message flows. In: Proceedings of the 2008 International Conference on Formal Methods in Computer-Aided Design, FMCAD 2008. FMCAD ’08, pp. 1–10. IEEE Press, Piscataway (2008), http://dl.acm.org/citation.cfm?id=1517424.1517434 Google Scholar

Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  • Divjyot Sethi
    • 1
  • Muralidhar Talupur
    • 2
  • Sharad Malik
    • 1
  1. 1.Princeton UniversityPrincetonUSA
  2. 2.Strategic CAD LabsIntel CorporationHillsboroUSA

Personalised recommendations