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Speculative Program Parallelization with Scalable and Decentralized Runtime Verification

  • Aravind Sukumaran-Rajam
  • Juan Manuel Martinez Caamaño
  • Willy Wolff
  • Alexandra Jimborean
  • Philippe Clauss
Part of the Lecture Notes in Computer Science book series (LNCS, volume 8734)

Abstract

Thread Level Speculation (TLS) is a dynamic code parallelization technique proposed to keep the software in pace with the advances in hardware, in particular, to automatically parallelize programs to take advantage of the multi-core processors. Being speculative, frameworks of this type unavoidably rely on verification systems that are similar to software transactional memory, and that require voluminous inter-thread communications or centralized registering of the performed memory accesses. The high degree of communication is against the basic principles of high performance parallel computing, does not scale with an increasing number of processor cores, and yields weak performance. Moreover, TLS systems often apply one unique parallelization strategy consisting in slicing a loop into several parallel speculative threads. Such a strategy is also against the basic principles since loops in the original serial code are not necessarily parallel and also, it is well-known that the parallel schedule must promote data locality which is crucial in obtaining good performance. This situation appeals to scalable and decentralized verification systems and new strategies to dynamically generate efficient parallel code resulting from advanced optimizing parallelizing transformations. Such transformations require a more complex verification system that allows intra-thread iterations to be reordered. In this paper, we propose a verification system of this kind, based on a model built at runtime and predicting a linear memory behavior. This strategy is part of the Apollo speculative code parallelizer which is based on an adaptation for dynamic usage of the polyhedral model.

Keywords

Loop Nest Benchmark Suite Parallel Code Memory Instruction Loop Bound 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  • Aravind Sukumaran-Rajam
    • 1
  • Juan Manuel Martinez Caamaño
    • 1
  • Willy Wolff
    • 1
  • Alexandra Jimborean
    • 2
  • Philippe Clauss
    • 1
  1. 1.INRIA, Team CAMUS, ICube Lab, CNRSUniversity of StrasbourgFrance
  2. 2.Department of Information TechnologyUppsala UniversitySweden

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