Abstract
In the previous chapters we have explained how to improve different aspects of the memory subsystem when dynamic memory is used in an embedded system. In particular, we explained how to design efficient custom dynamic memory managers to serve the dynamic memory requests of the applications.
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Notes
- 1.
It is possible that each of the instances of one DDT has very different access characteristics. A hypothetical mechanism to differentiate between them would be an interesting basis for future work.
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In extreme cases of platforms with many small memory blocks, this adjustment can lead to an unbounded increase of the pool size. To avoid this effect, the designer can use a smaller value or the algorithm could be changed to increase the size only the first time that the pool is split.
- 3.
It could still be possible to split the pool of packet bodies in two areas, one cacheable and the other non-cacheable, allocating space from the first one as long as possible. However, how big should the cacheable pool be? The answer to this question would require an analysis very similar to the one we propose! Besides, due to the difficulties in predicting the run-time behavior of cache hierarchies, some unwanted interactions could still happen.
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Energy consumption may increase in these cases because the cost of writing and reading input data from the scratchpad, and then writing and reading results before posting them to the DRAM, is added to the cost of accessing the data straight from the DRAM. As a result, independently of whether they are performed by the processor or the DMA, a net overhead of two writes and two reads to the scratchpad is created without any reutilization payback.
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© 2015 Springer International Publishing Switzerland
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Atienza Alonso, D. et al. (2015). Systematic Placement of Dynamic Objects Across Heterogeneous Memory Hierarchies. In: Dynamic Memory Management for Embedded Systems. Springer, Cham. https://doi.org/10.1007/978-3-319-10572-7_7
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DOI: https://doi.org/10.1007/978-3-319-10572-7_7
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