Preliminaries

  • Mehdi Dehbashi
  • Görschwin Fey
Chapter

Abstract

Each combinational circuit is represented by a directed acyclic graph C = (V, E), referred to as the circuit graph, where V is the set of circuit nodes and E ⊆ V × V, the set of edges, corresponds to the gate input-output connections in the circuit [LRS89]. For gate-level benchmarks, we consider the nodes to be gates with symmetric functions. Each node in the circuit graph is associated with a symmetric function which represents the corresponding behavior of that gate in the circuit. A symmetric function does not depend on the order of inputs but only on the sum of variables assigned to 0 or to 1, respectively.

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Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  • Mehdi Dehbashi
    • 1
  • Görschwin Fey
    • 2
  1. 1.Institute of Computer ScienceUniversity of BremenBremenGermany
  2. 2.Institute of Space SystemsGerman Aerospace CenterBremenGermany

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