Summary and Outlook

  • Mehdi Dehbashi
  • Görschwin Fey


The cost of VLSI systems verification and debugging has significantly grown in the recent years as design size and complexity have increased. Also due to time-to-market constraints, 100 % verification coverage at the design level is an elusive task. Consequently, automated debugging approaches are required at both pre-silicon and post-silicon stages in order to reduce the development time of IC products.

Copyright information

© Springer International Publishing Switzerland 2015

Authors and Affiliations

  • Mehdi Dehbashi
    • 1
  • Görschwin Fey
    • 2
  1. 1.Institute of Computer ScienceUniversity of BremenBremenGermany
  2. 2.Institute of Space SystemsGerman Aerospace CenterBremenGermany

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